Shayesteh Masoumian

According to our database, Shayesteh Masoumian authored at least 5 papers between 2017 and 2025.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of three.

2025

Modeling and Analysis of Aging Impact on SRAM PUFs for Advanced FinFET Technology Nodes.

Shayesteh Masoumian, Roel Maes, Noemie Beringuier-Boher, Karthik Keni Yerriswamy, Geert Jan Schrijen, Said Hamdioui, Mottaqiallah Taouil

Proceedings of the IEEE European Test Symposium, 2025

2023

Modeling and Analysis of SRAM PUF Bias Patterns in 14nm and 7nm FinFET Technology Nodes.

Shayesteh Masoumian, Roel Maes, Rui Wang, Karthik Keni Yerriswamy, Geert Jan Schrijen, Said Hamdioui, Mottaqiallah Taouil

Proceedings of the 31st IFIP/IEEE International Conference on Very Large Scale Integration, 2023

2022

Reliability Analysis of FinFET-Based SRAM PUFs for 16nm, 14nm, and 7nm Technology Nodes.

Shayesteh Masoumian, Georgios N. Selimis, Rui Wang, Geert Jan Schrijen, Said Hamdioui, Mottaqiallah Taouil

Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022

2020

Modeling Static Noise Margin for FinFET based SRAM PUFs.

Shayesteh Masoumian, Georgios N. Selimis, Roel Maes, Geert Jan Schrijen, Said Hamdioui, Mottaqiallah Taouil

Proceedings of the IEEE European Test Symposium, 2020

2017

Synchoricity and NOCs could make Billion Gate Custom Hardware Centric SOCs Affordable.

Ahmed Hemani, Syed Mohammad Asad Hassan Jafri, Shayesteh Masoumian

Proceedings of the Eleventh IEEE/ACM International Symposium on Networks-on-Chip, 2017