Sheng-Yu Fu

According to our database1, Sheng-Yu Fu authored at least 16 papers between 2015 and 2019.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2019
Exploiting SIMD Asymmetry in ARM-to-x86 Dynamic Binary Translation.
ACM Trans. Archit. Code Optim., 2019

Processor-Tracing Guided Region Formation in Dynamic Binary Translation.
ACM Trans. Archit. Code Optim., 2019

Optimizing data permutations in structured loads/stores translation and SIMD register mapping for a cross-ISA dynamic binary translator.
J. Syst. Archit., 2019

Exploiting Vector Processing in Dynamic Binary Translation.
Proceedings of the 48th International Conference on Parallel Processing, 2019

Translating Traditional SIMD Instructions to Vector Length Agnostic Architectures.
Proceedings of the IEEE/ACM International Symposium on Code Generation and Optimization, 2019

2018
Improving SIMD Parallelism via Dynamic Binary Translation.
ACM Trans. Embed. Comput. Syst., 2018

Efficient and retargetable SIMD translation in a dynamic binary translator.
Softw. Pract. Exp., 2018

Dynamic tuning of applications using restricted transactional memory.
Proceedings of the 2018 Conference on Research in Adaptive and Convergent Systems, 2018

Automatically Migrating Sequential Applications to Heterogeneous System Architecture.
Proceedings of the 2018 International Conference on High Performance Computing & Simulation, 2018

Exploiting SIMD capability in an ARMv7-to-ARMv8 dynamic binary translator.
Proceedings of the International Conference on Compilers, 2018

2017
Adaptive runtime exploiting sparsity in tensor of deep learning neural network on heterogeneous systems.
Proceedings of the 2017 International Conference on Embedded Computer Systems: Architectures, 2017

Dynamic translation of structured Loads/Stores and register mapping for architectures with SIMD extensions.
Proceedings of the 18th ACM SIGPLAN/SIGBED Conference on Languages, 2017

Exploiting Asymmetric SIMD Register Configurations in ARM-to-x86 Dynamic Binary Translation.
Proceedings of the 26th International Conference on Parallel Architectures and Compilation Techniques, 2017

2016
Exploiting Longer SIMD Lanes in Dynamic Binary Translation.
Proceedings of the 22nd IEEE International Conference on Parallel and Distributed Systems, 2016

2015
SIMD Code Translation in an Enhanced HQEMU.
Proceedings of the 21st IEEE International Conference on Parallel and Distributed Systems, 2015

Improving SIMD code generation in QEMU.
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015


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