Sheng Zhang

According to our database, Sheng Zhang authored at least 5 papers between 2003 and 2008.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2008

Planar Straight-Line Embedding of Double-Tree Scan Architecture on a Rectangular Grid.

Indranil Saha, Bhargab B. Bhattacharya, Sheng Zhang, Sharad C. Seth

Fundam. Informaticae, 2008

2005

On Finding Consecutive Test Vectors in a Random Sequence for Energy-Aware BIST Design.

Sheng Zhang, Sharad C. Seth, Bhargab B. Bhattacharya

Proceedings of the 18th International Conference on VLSI Design (VLSI Design 2005), 2005

Efficient Test Compaction for Pseudo-Random Testing.

Sheng Zhang, Sharad C. Seth, Bhargab B. Bhattacharya

Proceedings of the 14th Asian Test Symposium (ATS 2005), 2005

2003

Low-Energy BIST Design for Scan-based Logic Circuits.

Bhargab B. Bhattacharya, Sharad C. Seth, Sheng Zhang

Proceedings of the 16th International Conference on VLSI Design (VLSI Design 2003), 2003

Double-Tree Scan: A Novel Low-Power Scan-Path Architecture.

Bhargab B. Bhattacharya, Sharad C. Seth, Sheng Zhang

Proceedings of the Proceedings 2003 International Test Conference (ITC 2003), Breaking Test Interface Bottlenecks, 28 September, 2003