Shijie Li

Orcid: 0009-0004-6343-6941

According to our database1, Shijie Li authored at least 5 papers between 2024 and 2025.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

Online presence:

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Bibliography

2025
A Generalize Hardware Debugging Approach for Large Language Models Semi-Synthetic, Datasets.
IEEE Trans. Circuits Syst. I Regul. Pap., February, 2025

Enhancing LLM Performance on Hardware Design Generation Task via Reinforcement Learning.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2025

Intelligence In The Fence: Construct A Privacy and Reliable Hardware Design Assistant LLM.
Proceedings of the Great Lakes Symposium on VLSI 2025, GLSVLSI 2025, New Orleans, LA, USA, 30 June 2025, 2025

HWFixBench: Benchmarking Tools for Hardware Understanding and Fault Repair.
Proceedings of the Great Lakes Symposium on VLSI 2025, GLSVLSI 2025, New Orleans, LA, USA, 30 June 2025, 2025

2024
Hardware Phi-1.5B: A Large Language Model Encodes Hardware Domain Specific Knowledge.
Proceedings of the 29th Asia and South Pacific Design Automation Conference, 2024


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