Shijie Li

According to our database, Shijie Li authored at least 6 papers between 2024 and 2025.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2025

A Generalize Hardware Debugging Approach for Large Language Models Semi-Synthetic, Datasets.

Weimin Fu, Shijie Li, Yifang Zhao, Kaichen Yang, Xuan Zhang, Yier Jin, Xiaolong Guo

IEEE Trans. Circuits Syst. I Regul. Pap., February, 2025

Enhancing LLM Performance on Hardware Design Generation Task via Reinforcement Learning.

Yifang Zhao, Weimin Fu, Shijie Li, Yixiang Hu, Xiaolong Guo, Yier Jin

Proceedings of the IEEE International Symposium on Circuits and Systems, 2025

Intelligence In The Fence: Construct A Privacy and Reliable Hardware Design Assistant LLM.

Shijie Li, Weimin Fu, Yifang Zhao, Xiaolong Guo, Yier Jin

Proceedings of the Great Lakes Symposium on VLSI 2025, GLSVLSI 2025, New Orleans, LA, USA, 30 June 2025, 2025

HWFixBench: Benchmarking Tools for Hardware Understanding and Fault Repair.

Weimin Fu, Shijie Li, Yier Jin, Xiaolong Guo

Proceedings of the Great Lakes Symposium on VLSI 2025, GLSVLSI 2025, New Orleans, LA, USA, 30 June 2025, 2025

Hardware Generation with High Flexibility using Reinforcement Learning Enhanced LLMs.

Yifang Zhao, Weimin Fu, Shijie Li, Yi-Xiang Hu, Xiaolong Guo, Yier Jin

Proceedings of the 62nd ACM/IEEE Design Automation Conference, 2025

2024

Hardware Phi-1.5B: A Large Language Model Encodes Hardware Domain Specific Knowledge.

Weimin Fu, Shijie Li, Yifang Zhao, Haocheng Ma, Raj Gautam Dutta, Xuan Zhang, Kaichen Yang, Yier Jin, Xiaolong Guo

Proceedings of the 29th Asia and South Pacific Design Automation Conference, 2024