Xiaolong Guo

According to our database, Xiaolong Guo authored at least 63 papers between 2015 and 2026.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2026

Configuration Over Selection: Hyperparameter Sensitivity Exceeds Model Differences in Open-Source LLMs for RTL Generation.

Minghao Shao, Zeng Wang, Weimin Fu, Xiaolong Guo, Johann Knechtel, Ozgur Sinanoglu, Ramesh Karri, Muhammad Shafique

CoRR, April, 2026

From Natural Language to Silicon: The Representation Bottleneck in LLM Hardware Design.

Weimin Fu, Zeng Wang, Minghao Shao, Johann Knechtel, Ozgur Sinanoglu, Ramesh Karri, Muhammad Shafique, Xiaolong Guo

CoRR, April, 2026

HarmChip: Evaluating Hardware Security Centric LLM Safety via Jailbreak Benchmarking.

Zeng Wang, Minghao Shao, Weimin Fu, Prithwish Basu Roy, Xiaolong Guo, Ramesh Karri, Muhammad Shafique, Johann Knechtel, Ozgur Sinanoglu

CoRR, April, 2026

BlindMarket: Enabling Verifiable, Confidential, and Traceable IP Core Distribution in Zero-Trust Settings.

Zhaoxiang Liu, Samuel Judson, Raj Gautam Dutta, Mark Santolucito, Xiaolong Guo, Ning Luo

CoRR, March, 2026

Synthesis-in-the-Loop Evaluation of LLMs for RTL Generation: Quality, Reliability, and Failure Modes.

Weimin Fu, Zeng Wang, Minghao Shao, Ramesh Karri, Muhammad Shafique, Johann Knechtel, Ozgur Sinanoglu, Xiaolong Guo

Proceedings of the Great Lakes Symposium on VLSI 2026, 2026

Control-Flow Collapse: Exploiting Gating Logic in MoE Accelerators via Instruction-Level Fault Injection.

Weimin Fu, Zelin Lu, Gang Qu, Xiaolong Guo

Proceedings of the Great Lakes Symposium on VLSI 2026, 2026

2025

AnalogSAGE: Self-evolving Analog Design Multi-Agents with Stratified Memory and Grounded Experience.

Zining Wang, Jian Gao, Weimin Fu, Xiaolong Guo, Xuan Zhang

CoRR, December, 2025

Boosting Cryptographic ICs' Side-Channel Resistance: A Formal Framework for Automatic Identification and Protection of Leaky Paths.

Qizhi Zhang, Ya Gao, Haocheng Ma, Jiaji He, Yiqiang Zhao, Xiaolong Guo

ACM Trans. Embed. Comput. Syst., November, 2025

A Generalize Hardware Debugging Approach for Large Language Models Semi-Synthetic, Datasets.

Weimin Fu, Shijie Li, Yifang Zhao, Kaichen Yang, Xuan Zhang, Yier Jin, Xiaolong Guo

IEEE Trans. Circuits Syst. I Regul. Pap., February, 2025

FusionESP: Improved Enzyme-Substrate Pair Prediction by Fusing Protein and Chemical Knowledge.

Zhenjiao Du, Weimin Fu, Xiaolong Guo, Doina Caragea, Yonghui Li

J. Chem. Inf. Model., 2025

HADA: Leveraging Multi-Source Data to Train Large Language Models for Hardware Security Assertion Generation.

Weimin Fu, Yiting Wang, Zelin Lu, Xiaolong Guo, Gang Qu

Proceedings of the 7th ACM/IEEE Symposium on Machine Learning for CAD, 2025

Cross-Layer EM Fault Injection Assessment Framework.

Hanqiu Wang, Ruochen Dai, Tuba Yavuz, Xiaolong Guo, Orlando Arias, Dean Sullivan, Michael Lee, Honggang Yu, Siqi Dai, Domenic Forte, Shuo Wang

Proceedings of the 26th International Symposium on Quality Electronic Design, 2025

Enhancing LLM Performance on Hardware Design Generation Task via Reinforcement Learning.

Yifang Zhao, Weimin Fu, Shijie Li, Yixiang Hu, Xiaolong Guo, Yier Jin

Proceedings of the IEEE International Symposium on Circuits and Systems, 2025

Building Reasoning LLMs for Hardware Design Generation via Function-Aligned Differentiated Revision.

Weimin Fu, Shijie Li, Kaichen Yang, Xuan Silvia Zhang, Yier Jin, Xiaolong Guo

Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2025

Evaluating the Effectiveness of Hardware Trojan Detection Approaches at RTL.

Ruochen Dai, Zhaoxiang Liu, Orlando Arias, Xiaolong Guo, Tuba Yavuz

Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust, 2025

Intelligence In The Fence: Construct A Privacy and Reliable Hardware Design Assistant LLM.

Shijie Li, Weimin Fu, Yifang Zhao, Xiaolong Guo, Yier Jin

Proceedings of the Great Lakes Symposium on VLSI 2025, GLSVLSI 2025, New Orleans, LA, USA, 30 June 2025, 2025

HWFixBench: Benchmarking Tools for Hardware Understanding and Fault Repair.

Weimin Fu, Shijie Li, Yier Jin, Xiaolong Guo

Proceedings of the Great Lakes Symposium on VLSI 2025, GLSVLSI 2025, New Orleans, LA, USA, 30 June 2025, 2025

Hardware Generation with High Flexibility using Reinforcement Learning Enhanced LLMs.

Yifang Zhao, Weimin Fu, Shijie Li, Yixiang Hu, Xiaolong Guo, Yier Jin

Proceedings of the 62nd ACM/IEEE Design Automation Conference, 2025

EVA: An Efficient and Versatile Generative Engine for Targeted Discovery of Novel Analog Circuits.

Jian Gao, Weimin Fu, Xiaolong Guo, Weidong Cao, Xuan Zhang

Proceedings of the 62nd ACM/IEEE Design Automation Conference, 2025

Leveraging Large Language Models for Secure Hardware Verification and Analysis.

Yifang Zhao, Weimin Fu, Yixiang Hu, Shijie Li, Xiaolong Guo, Yier Jin

Proceedings of the Asian Hardware Oriented Security and Trust Symposium, 2025

Fixbench-RTL: A Comprehensive Benchmark for Evaluating LLMs on RTL Debugging.

Shijie Li, Weimin Fu, Yifang Zhao, Xiaolong Guo, Yier Jin

Proceedings of the Asian Hardware Oriented Security and Trust Symposium, 2025

Rethinking LLM Safety on Edge Devices: Unearthing Hidden Vulnerabilities through Power Stress.

Weimin Fu, Zelin Lu, Gang Qu, Xiaolong Guo

Proceedings of the Asian Hardware Oriented Security and Trust Symposium, 2025

2024

PowerScout: Security-Oriented Power Delivery Network Modeling for Side-Channel Vulnerability Analysis.

Huifeng Zhu, Xiaolong Guo, Yier Jin, Xuan Zhang

IEEE Trans. Emerg. Top. Comput., 2024

DTjRTL: A Configurable Framework for Automated Hardware Trojan Insertion at RTL.

Ruochen Dai, Zhaoxiang Liu, Orlando Arias, Xiaolong Guo, Tuba Yavuz

Proceedings of the Great Lakes Symposium on VLSI 2024, 2024

Poster: BlindMarket: A Trustworthy Chip Designs Marketplace for IP Vendors and Users.

Zhaoxiang Liu, Ning Luo, Samuel Judson, Raj Gautam Dutta, Xiaolong Guo, Mark Santolucito

Proceedings of the 2024 on ACM SIGSAC Conference on Computer and Communications Security, 2024

Poster: Enhance Hardware Domain Specific Large Language Model with Reinforcement Learning for Resilience.

Weimin Fu, Yifang Zhao, Yier Jin, Xiaolong Guo

Proceedings of the 2024 on ACM SIGSAC Conference on Computer and Communications Security, 2024

Microscope: Causality Inference Crossing the Hardware and Software Boundary from Hardware Perspective.

Zhaoxiang Liu, Kejun Chen, Dean Sullivan, Orlando Arias, Raj Gautam Dutta, Yier Jin, Xiaolong Guo

Proceedings of the 29th Asia and South Pacific Design Automation Conference, 2024

Hardware Phi-1.5B: A Large Language Model Encodes Hardware Domain Specific Knowledge.

Weimin Fu, Shijie Li, Yifang Zhao, Haocheng Ma, Raj Gautam Dutta, Xuan Zhang, Kaichen Yang, Yier Jin, Xiaolong Guo

Proceedings of the 29th Asia and South Pacific Design Automation Conference, 2024

2023

PDNPulse: Sensing PCB Anomaly With the Intrinsic Power Delivery Network.

Huifeng Zhu, Haoqi Shan, Dean Sullivan, Xiaolong Guo, Yier Jin, Xuan Zhang

IEEE Trans. Inf. Forensics Secur., 2023

IP-Tag: Tag-Based Runtime 3PIP Hardware Trojan Detection in SoC Platforms.

Kejun Chen, Orlando Arias, Xiaolong Guo, Qingxu Deng, Yier Jin

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2023

VGF: Value-Guided Fuzzing - Fuzzing Hardware as Hardware.

Ruochen Dai, Michael Lee, Patrick Hoey, Weimin Fu, Tuba Yavuz, Xiaolong Guo, Shuo Wang, Dean Sullivan, Orlando Arias

CoRR, 2023

LLM4SecHW: Leveraging Domain-Specific Large Language Model for Hardware Debugging.

Weimin Fu, Kaichen Yang, Raj Gautam Dutta, Xiaolong Guo, Gang Qu

Proceedings of the Asian Hardware Oriented Security and Trust Symposium, 2023

2022

FineDIFT: Fine-Grained Dynamic Information Flow Tracking for Data-Flow Integrity Using Coprocessor.

Kejun Chen, Orlando Arias, Qingxu Deng, Daniela Oliveira, Xiaolong Guo, Yier Jin

IEEE Trans. Inf. Forensics Secur., 2022

Security Oriented Design Framework for EM Side-Channel Protection in RTL Implementations.

Jiaji He, Haocheng Ma, Max Panoff, Hanning Wang, Yiqiang Zhao, Leibo Liu, Xiaolong Guo, Yier Jin

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

EM Side Channels in Hardware Security: Attacks and Defenses.

Jiaji He, Xiaolong Guo, Mark Tehranipoor, Apostol Vassilev, Yier Jin

IEEE Des. Test, 2022

Graph Neural Network based Hardware Trojan Detection at Intermediate Representative for SoC Platforms.

Weimin Fu, Honggang Yu, Orlando Arias, Kaichen Yang, Yier Jin, Tuba Yavuz, Xiaolong Guo

Proceedings of the GLSVLSI '22: Great Lakes Symposium on VLSI 2022, Irvine CA USA, June 6, 2022

Inter-IP Malicious Modification Detection through Static Information Flow Tracking.

Zhaoxiang Liu, Orlando Arias, Weimin Fu, Yier Jin, Xiaolong Guo

Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022

RTSEC: Automated RTL Code Augmentation for Hardware Security Enhancement.

Orlando Arias, Zhaoxiang Liu, Xiaolong Guo, Yier Jin, Shuo Wang

Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022

2021

Fuzzing Hardware: Faith or Reality? : Invited Paper.

Weimin Fu, Orlando Arias, Yier Jin, Xiaolong Guo

Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, 2021

TRRScope: Understanding Target Row Refresh Mechanism for Modern DDR Protection.

Yichen Jiang, Huifeng Zhu, Haoqi Shan, Xiaolong Guo, Xuan Zhang, Yier Jin

Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust, 2021

Towards scalable, secure, and smart mission-critical IoT systems: review and vision.

Xiaolong Guo, Song Han, X. Sharon Hu, Xun Jiao, Yier Jin, Fanxin Kong, Michael Lemmon

Proceedings of the EMSOFT '21: Proceedings of the 2021 International Conference on Embedded Software, Virtual Event, October 8, 2021

Quantifying Rowhammer Vulnerability for DRAM Security.

Yichen Jiang, Huifeng Zhu, Dean Sullivan, Xiaolong Guo, Xuan Zhang, Yier Jin

Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021

PCBench: Benchmarking of Board-Level Hardware Attacks and Trojans.

Huifeng Zhu, Xiaolong Guo, Yier Jin, Xuan Zhang

Proceedings of the ASPDAC '21: 26th Asia and South Pacific Design Automation Conference, 2021

2020

Runtime Trust Evaluation and Hardware Trojan Detection Using On-Chip EM Sensors.

Jiaji He, Xiaolong Guo, Haocheng Ma, Yanjiang Liu, Yiqiang Zhao, Yier Jin

Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020

Design for EM Side-Channel Security through Quantitative Assessment of RTL Implementations.

Jiaji He, Haocheng Ma, Xiaolong Guo, Yiqiang Zhao, Yier Jin

Proceedings of the 25th Asia and South Pacific Design Automation Conference, 2020

PowerScout: A Security-Oriented Power Delivery Network Modeling Framework for Cross-Domain Side-Channel Analysis.

Huifeng Zhu, Xiaolong Guo, Yier Jin, Xuan Zhang

Proceedings of the Asian Hardware Oriented Security and Trust Symposium, 2020

A Formal Framework for Gate- Level Information Leakage Using Z3.

Qizhi Zhang, Jiaji He, Yiqiang Zhao, Xiaolong Guo

Proceedings of the Asian Hardware Oriented Security and Trust Symposium, 2020

2019

SoC interconnection protection through formal verification.

Jiaji He, Xiaolong Guo, Travis Meade, Raj Gautam Dutta, Yiqiang Zhao, Yier Jin

Integr., 2019

Hardware and Software Co-Verification from Security Perspective.

Kejun Chen, Qingxu Deng, Yumin Hou, Yier Jin, Xiaolong Guo

Proceedings of the 20th International Workshop on Microprocessor/SoC Test, 2019

QIF-Verilog: Quantitative Information-Flow based Hardware Description Languages for Pre-Silicon Security Assessment.

Xiaolong Guo, Raj Gautam Dutta, Jiaji He, Mark Tehranipoor, Yier Jin

Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust, 2019

When Capacitors Attack: Formal Method Driven Design and Detection of Charge-Domain Trojans.

Xiaolong Guo, Huifeng Zhu, Yier Jin, Xuan Zhang

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

2017

Hardware Trojan Detection Through Chip-Free Electromagnetic Side-Channel Statistical Analysis.

Jiaji He, Yiqiang Zhao, Xiaolong Guo, Yier Jin

IEEE Trans. Very Large Scale Integr. Syst., 2017

Automatic Code Converter Enhanced PCH Framework for SoC Trust Verification.

Xiaolong Guo, Raj Gautam Dutta, Prabhat Mishra, Yier Jin

IEEE Trans. Very Large Scale Integr. Syst., 2017

Data Secrecy Protection Through Information Flow Tracking in Proof-Carrying Hardware IP - Part I: Framework Fundamentals.

Yier Jin, Xiaolong Guo, Raj Gautam Dutta, Mohammad-Mahdi Bidmeshki, Yiorgos Makris

IEEE Trans. Inf. Forensics Secur., 2017

Eliminating the Hardware-Software Boundary: A Proof-Carrying Approach for Trust Evaluation on Computer Systems.

Xiaolong Guo, Raj Gautam Dutta, Yier Jin

IEEE Trans. Inf. Forensics Secur., 2017

Data Secrecy Protection Through Information Flow Tracking in Proof-Carrying Hardware IP - Part II: Framework Automation.

Mohammad-Mahdi Bidmeshki, Xiaolong Guo, Raj Gautam Dutta, Yier Jin, Yiorgos Makris

IEEE Trans. Inf. Forensics Secur., 2017

Estimation of Safe Sensor Measurements of Autonomous System Under Attack.

Raj Gautam Dutta, Xiaolong Guo, Teng Zhang, Kevin A. Kwiat, Charles A. Kamhoua, Laurent Njilla, Yier Jin

Proceedings of the 54th Annual Design Automation Conference, 2017

PCH framework for IP runtime security verification.

Xiaolong Guo, Raj Gautam Dutta, Jiaji He, Yier Jin

Proceedings of the 2017 Asian Hardware Oriented Security and Trust Symposium, 2017

2016

Quantifying trust in autonomous system under uncertainties.

Raj Gautam Dutta, Xiaolong Guo, Yier Jin

Proceedings of the 29th IEEE International System-on-Chip Conference, 2016

Automatic RTL-to-Formal Code Converter for IP Security Formal Verification.

Xiaolong Guo, Raj Gautam Dutta, Prabhat Mishra, Yier Jin

Proceedings of the 17th International Workshop on Microprocessor and SOC Test and Verification, 2016

Scalable SoC trust verification using integrated theorem proving and model checking.

Xiaolong Guo, Raj Gautam Dutta, Prabhat Mishra, Yier Jin

Proceedings of the 2016 IEEE International Symposium on Hardware Oriented Security and Trust, 2016

2015

Hierarchy-Preserving Formal Verification Methods for Pre-silicon Security Assurance.

Xiaolong Guo, Raj Gautam Dutta, Yier Jin

Proceedings of the 16th International Workshop on Microprocessor and SOC Test and Verification, 2015

Pre-silicon security verification and validation: a formal perspective.

Xiaolong Guo, Raj Gautam Dutta, Yier Jin, Farimah Farahmandi, Prabhat Mishra

Proceedings of the 52nd Annual Design Automation Conference, 2015