Shinji Satoh

According to our database1, Shinji Satoh authored at least 2 papers between 1999 and 2000.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2000
A source-line programming scheme for low-voltage operation NAND flash memories.
IEEE J. Solid State Circuits, 2000

1999
A negative V<sub>th</sub> cell architecture for highly scalable, excellently noise-immune, and highly reliable NAND flash memories.
IEEE J. Solid State Circuits, 1999


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