Kenichi Imamiya
According to our database1,
Kenichi Imamiya
authored at least 6 papers
between 1995 and 2008.
Collaborative distances:
Collaborative distances:
Timeline
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2008
2002
IEEE J. Solid State Circuits, 2002
2000
IEEE J. Solid State Circuits, 2000
1999
A negative V<sub>th</sub> cell architecture for highly scalable, excellently noise-immune, and highly reliable NAND flash memories.
IEEE J. Solid State Circuits, 1999
IEEE J. Solid State Circuits, 1999
1995
IEEE J. Solid State Circuits, November, 1995