Shinya Itoh

According to our database1, Shinya Itoh authored at least 11 papers between 2000 and 2012.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2012
A Low-Noise High Intrascene Dynamic Range CMOS Image Sensor With a 13 to 19b Variable-Resolution Column-Parallel Folding-Integration/Cyclic ADC.
IEEE J. Solid State Circuits, 2012

2011
Design and Implementation of A CMOS Light Pulse Receiver Cell Array for Spatial Optical Communications.
Sensors, 2011

An 80μVrms-temporal-noise 82dB-dynamic-range CMOS Image Sensor with a 13-to-19b variable-resolution column-parallel folding-integration/cyclic ADC.
Proceedings of the IEEE International Solid-State Circuits Conference, 2011

A CMOS image sensor with draining only modulation pixels for fluorescence lifetime imaging.
Proceedings of the Sensors, 2011

2010
Column-Parallel Correlated Multiple Sampling Circuits for CMOS Image Sensors and Their Noise Reduction Effects.
Sensors, 2010

A 2.7e- temporal noise 99.7% shutter efficiency 92dB dynamic range CMOS image sensor with dual global shutter pixels.
Proceedings of the IEEE International Solid-State Circuits Conference, 2010

A CMOS image sensor for 10Mb/s 70m-range LED-based spatial optical communication.
Proceedings of the IEEE International Solid-State Circuits Conference, 2010

2008
A 15b power-efficient pipeline A/D converter using non-slewing closed-loop amplifiers.
Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, 2008

2007
A low-power transmitter design for inductive data link with class-F switching operation.
IEICE Electron. Express, 2007

2006
A 2.6mW 2fps QVGA CMOS one-chip wireless camera with digital image transmission function for capsule endoscopes.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

2000
A 16-Mb 400-MHz loadless CMOS four-transistor SRAM macro.
IEEE J. Solid State Circuits, 2000


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