Shozo Hirano

According to our database, Shozo Hirano authored at least 4 papers between 2002 and 2005.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2005

Power-Supply Noise Reduction with Design for Manufacturability.

Hiroyuki Tsujikawa, Kenji Shimazaki, Shozo Hirano, Kazuhiro Sato, Masanori Hirofuji, Junichi Shimada, Mitsumi Ito, Kiyohito Mukai

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2005

Dynamic Power-Supply and Well Noise Measurements and Analysis for Low Power Body Biased Circuits.

Kenji Shimazaki, Makoto Nagata, Takeshi Okumoto, Shozo Hirano, Hiroyuki Tsujikawa

IEICE Trans. Electron., 2005

2003

A Design Methodology for Low EMI Noise LSI with Fast and Accurate Estimation.

Hiroyuki Tsujikawa, Shozo Hirano, Kenji Shimazaki

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2003

2002

A design methodology for low EMI-noise microprocessor with accurate estimation-reduction-verification.

Hiroyulu Tsujikawa, Kenji Shimazaki, Shozo Hirano, Motohiro Ohki, Talcashi Yoneda, Hiroshi Benno

Proceedings of the IEEE 2002 Custom Integrated Circuits Conference, 2002