Shu-Yuan Chin

According to our database1, Shu-Yuan Chin authored at least 4 papers between 1993 and 1996.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

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Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

1996
A CMOS ratio-independent and gain-insensitive algorithmic analog-to-digital converter.
IEEE J. Solid State Circuits, 1996

1994
A 10-b 125-MHz CMOS digital-to-analog converter (DAC) with threshold-voltage compensated current sources.
IEEE J. Solid State Circuits, November, 1994

An Alorithmic Analog-to-Digital Converter with low Ratio-and Gain-Sensitivities and 4N-Clock Conversion Cycle.
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994

1993
A Ratio-independent and Gain-insensitive Algorithmic Analog-to-digital Converter.
Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993


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