Shukao Dou

Orcid: 0009-0008-9505-2036

According to our database¹, Shukao Dou authored at least 3 papers between 2024 and 2025.

Collaborative distances:

Dijkstra number² of five.
Erdős number³ of five.

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Bibliography

2025

A Charge Domain SRAM Computing-in-Memory Macro With Quantized Interval-Optimized ADC and Input Bit-Level Sparsity-Optimized P2O-DAC for 8-b MAC Operation.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., May, 2025

An energy-efficient readout method based on weight-flip-store coding and quantization cycle skipping technology for computing in memory.

[BibT_eX]

[DOI]

IEICE Electron. Express, 2025

2024

A Dual-Wordline 6T SRAM Computing-In-Memory Macro Featuring Full Signed Multi-Bit Computation for Lightweight Networks.

[BibT_eX]

[DOI]

IEEE Access, 2024

Shukao Dou

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