Shyue-Wen Yang

According to our database1, Shyue-Wen Yang authored at least 7 papers between 2004 and 2015.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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Links

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Bibliography

2015
Extendable multi-pixel object labeling for digital image.
Proceedings of the IEEE International Conference on Consumer Electronics - Taiwan, 2015

2012
Fast image moving object segmentation based on block texture for embedded system implementation.
Proceedings of the International Symposium on Intelligent Signal Processing and Communications Systems, 2012

2010
FPGA implementation for image object detection system on NoCs.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2010

2009
Parallel 3-Pixel Labeling Method and its Hardware Architecture Design.
Proceedings of the Fifth International Conference on Information Assurance and Security, 2009

2007
Fast Fair Crossbar Scheduler for On-chip Router.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

2005
VLSI architecture design for a fast parallel label assignment in binary image.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

2004
An efficient VLSI design for a residue to binary converter for general balance moduli (2<sup>n</sup>-3, 2<sup>n</sup>+1, 2<sup>n</sup>-1, 2<sup>n</sup>+3).
IEEE Trans. Circuits Syst. II Express Briefs, 2004


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