Siddhartha

Orcid: 0000-0002-6721-3997

Affiliations:
  • Advanced Micro Devices, Singapore
  • Nanyang Technological University, Singapore (PhD 2019)


According to our database1, Siddhartha authored at least 17 papers between 2014 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

Online presence:

On csauthors.net:

Bibliography

2023
Demo: Enabling DNN Inference in the Network Data Plane.
Proceedings of the 6th on European P4 Workshop, 2023

2020
Range-Doppler Detection in Automotive Radar with Deep Learning.
Proceedings of the 2020 International Joint Conference on Neural Networks, 2020

2019
Dataflow optimized overlays for FPGAs
PhD thesis, 2019

2018
CaffePresso: Accelerating Convolutional Networks on Embedded SoCs.
ACM Trans. Embed. Comput. Syst., 2018

DaCO: A High-Performance Token Dataflow Coprocessor Overlay for FPGAs.
Proceedings of the International Conference on Field-Programmable Technology, 2018

Hoplite-Q: Priority-Aware Routing in FPGA Overlay NoCs.
Proceedings of the 26th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2018

2017
Out-of-Order Dataflow Scheduling for FPGA Overlays.
CoRR, 2017

eBSP: Managing NoC traffic for BSP workloads on the 16-core Adapteva Epiphany-III processor.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

2016
Vector FPGA acceleration of 1-D DWT computations using sparse matrix skeletons.
Proceedings of the 26th International Conference on Field Programmable Logic and Applications, 2016

Communication Optimization for the 16-Core Epiphany Floating-Point Processor Array.
Proceedings of the 24th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2016

Evaluating Embedded FPGA Accelerators for Deep Learning Applications.
Proceedings of the 24th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2016

CaffePresso: an optimized library for deep learning on embedded accelerator-based platforms.
Proceedings of the 2016 International Conference on Compilers, 2016

2015
GraphMMU: Memory Management Unit for Sparse Graph Accelerators.
Proceedings of the 2015 IEEE International Parallel and Distributed Processing Symposium Workshop, 2015

FPGA Acceleration of Irregular Iterative Computations using Criticality-Aware Dataflow Optimizations (Abstract Only).
Proceedings of the 2015 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2015

2014
Fanout decomposition dataflow optimizations for FPGA-based Sparse LU factorization.
Proceedings of the 2014 International Conference on Field-Programmable Technology, 2014

Heterogeneous dataflow architectures for FPGA-based sparse LU factorization.
Proceedings of the 24th International Conference on Field Programmable Logic and Applications, 2014

Breaking Sequential Dependencies in FPGA-Based Sparse LU Factorization.
Proceedings of the 22nd IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2014


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