Sneha Swaroopa
According to our database1,
Sneha Swaroopa
authored at least 5 papers
between 2024 and 2025.
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Bibliography
2025
PUFBind: PUF-Enabled Lightweight Program Binary Authentication for FPGA-based Embedded Systems.
CoRR, January, 2025
Evaluating Large Language Models for Automatic Register Transfer Logic Generation for Combinational Circuits via High-Level Synthesis.
Found. Trends Electron. Des. Autom., 2025
2024
A Provably Secure Scheme to Prevent Master Key Recovery by Fault Attack on AES Hardware.
IEEE Embed. Syst. Lett., December, 2024
Evaluating Large Language Models for Automatic Register Transfer Logic Generation via High-Level Synthesis.
CoRR, 2024
Proceedings of the 33rd IEEE Asian Test Symposium, 2024