Sneha Swaroopa

Orcid: 0009-0000-7416-5316

According to our database1, Sneha Swaroopa authored at least 6 papers between 2024 and 2026.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book  In proceedings  Article  PhD thesis  Dataset  Other 

Links

On csauthors.net:

Bibliography

2026
Scalable Security Monitoring on Chiplet-Based Systems.
Proceedings of the 27th International Symposium on Quality Electronic Design, 2026

2025
PUFBind: PUF-Enabled Lightweight Program Binary Authentication for FPGA-based Embedded Systems.
CoRR, January, 2025

Evaluating Large Language Models for Automatic Register Transfer Logic Generation for Combinational Circuits via High-Level Synthesis.
Found. Trends Electron. Des. Autom., 2025

2024
A Provably Secure Scheme to Prevent Master Key Recovery by Fault Attack on AES Hardware.
IEEE Embed. Syst. Lett., December, 2024

Evaluating Large Language Models for Automatic Register Transfer Logic Generation via High-Level Synthesis.
CoRR, 2024

Security Vulnerabilities in AI Hardware: Threats and Countermeasures.
Proceedings of the 33rd IEEE Asian Test Symposium, 2024


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