Spiridon F. Beldianu

According to our database, Spiridon F. Beldianu authored at least 9 papers between 2009 and 2015.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2015

Performance-Energy Optimizations for Shared Vector Accelerators in Multicores.

Spiridon F. Beldianu, Sotirios G. Ziavras

IEEE Trans. Computers, 2015

2014

ASIC Design of Shared Vector Accelerators for Multicore Processors.

Spiridon F. Beldianu, Sotirios G. Ziavras

Proceedings of the 26th IEEE International Symposium on Computer Architecture and High Performance Computing, 2014

2013

Multicore-based vector coprocessor sharing for performance and energy gains.

Spiridon F. Beldianu, Sotirios G. Ziavras

ACM Trans. Embed. Comput. Syst., 2013

Efficient on-chip vector processing for multicore processors.

Spiridon F. Beldianu, Sotirios G. Ziavras

Proceedings of the 2013 International Symposium on System on Chip, 2013

FPGA and ASIC square root designs for high performance and power efficiency.

Shashank Suresh, Spiridon F. Beldianu, Sotirios G. Ziavras

Proceedings of the 24th International Conference on Application-Specific Systems, 2013

2012

Versatile design of shared vector coprocessors for multicores.

Spiridon F. Beldianu, Christopher Dahlberg, Timothy Steele, Sotirios G. Ziavras

Microprocess. Microsystems, 2012

2011

On-chip Vector Coprocessor Sharing for Multicores.

Spiridon F. Beldianu, Sotirios G. Ziavras

Proceedings of the 19th International Euromicro Conference on Parallel, 2011

2010

Scheduling for input-queued packet switches by a re-configurable parallel match evaluator.

Spiridon F. Beldianu, Roberto Rojas-Cessa, Eiji Oki, Sotirios G. Ziavras

IEEE Commun. Lett., 2010

2009

Re-Configurable Parallel Match Evaluators Applied to Scheduling Schemes for Input-Queued Packet Switches.

Spiridon F. Beldianu, Roberto Rojas-Cessa, Eiji Oki, Sotirios G. Ziavras

Proceedings of the 18th International Conference on Computer Communications and Networks, 2009