Srisubha Kalanadhabhatta

According to our database, Srisubha Kalanadhabhatta authored at least 5 papers between 2020 and 2025.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2025

Leveraging IO Pad Protection Diodes for Recycled IC Detection and Age Estimation Using Polynomial Regression.

Anmol Singh Narwariya, Srisubha Kalanadhabhatta, Amit Acharyya

IEEE Trans. Very Large Scale Integr. Syst., 2025

2022

Modeling Attacks Resilient Multiple PUF-CPRNG Architecture Design Methodology.

Agshare Dheeraj, Pabitra Das, Kiran Kumar A, Srisubha Kalanadhabhatta, Amit Acharyya

Proceedings of the 35th IEEE International System-on-Chip Conference, 2022

2021

IC Age Estimation Methodology Using IO Pad Protection Diodes for Prevention of Recycled ICs.

Srisubha Kalanadhabhatta, Rashi Dutt, S. Saqib Khursheed, Amit Acharyya

Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

2020

PUF-Based Secure Chaotic Random Number Generator Design Methodology.

Srisubha Kalanadhabhatta, Deepak Kumar, Kiran Kumar Anumandla, S. Ashish Reddy, Amit Acharyya

IEEE Trans. Very Large Scale Integr. Syst., 2020

Secure Scan Design with a Novel Methodology of Scan Camouflaging.

Srisubha Kalanadhabhatta, Kiran Kumar Anumandla, S. Saqib Khursheed, Amit Acharyya

Proceedings of the European Conference on Circuit Theory and Design, 2020