Stefan Joeres

According to our database1, Stefan Joeres authored at least 9 papers between 2007 and 2009.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2009
Modeling Approaches for Functional Verification of RF-SoCs: Limits and Future Requirements.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2009

A 2.7 mW, 90.3 dB DR Continuous-Time Quadrature Bandpass Sigma-Delta Modulator for GSM/EDGE Low-IF Receiver in 0.25 µm CMOS.
IEEE J. Solid State Circuits, 2009

2008
Effect of Mismatched Loop Delay in Continuous-Time Complex Sigma-Delta Modulators.
IEEE Trans. Circuits Syst. II Express Briefs, 2008

A Polyphase Filter Design for Continuous-Time Quadrature Bandpass Sigma-Delta Modulators.
IEEE Trans. Circuits Syst. I Regul. Pap., 2008

Continuous-time quadrature bandpass sigma-delta modulator with capacitive feedforward summation for GSM/EDGE low-IF receiver.
Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, 2008

Complex mismatch shaper for tree-structured DAC in multi-bit complex sigma-delta modulators.
Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, 2008

Issues on View Switching for RF SoC Verification.
Proceedings of the 2008 IEEE International Behavioral Modeling and Simulation Workshop, 2008

2007
A compensation method of the excess loop delay in continuous-time complex sigma-delta modulators.
Proceedings of the 18th European Conference on Circuit Theory and Design, 2007

Simulation of quadrature-bandpass Sigma-Delta analog to digital converters using state space descriptions.
Proceedings of the 18th European Conference on Circuit Theory and Design, 2007


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