Stephan Kubisch

According to our database1, Stephan Kubisch authored at least 13 papers between 2004 and 2010.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2010
Trading Hardware Overhead for Communication Performance in Mesh-Type Topologies.
Proceedings of the 13th Euromicro Conference on Digital System Design, 2010

2009
Architekturen für Ethernet-basierte Teilnehmerzugangsnetzwerke und deren Umsetzung in Hardware
PhD thesis, 2009

Trust-by-Wire in Packet-Switched IPv6 Networks: Tools and FPGA Prototype for the IPclip System.
Proceedings of the 6th IEEE Consumer Communications and Networking Conference, 2009

2008
IPclip: An architecture to restore Trust-by-Wire in packet-switched networks.
Proceedings of the LCN 2008, 2008

Countering phishing threats with trust-by-wire in packet-switched ip networks - a conceptual framework.
Proceedings of the 22nd IEEE International Symposium on Parallel and Distributed Processing, 2008

2007
Mapping a Pipelined Data Path onto a Network-on-Chip.
Proceedings of the IEEE Second International Symposium on Industrial Embedded Systems, 2007

Architektur einer flexiblen, wiederverwendbaren Testbench zur Verifikation paketverarbeitender Hardware in SystemC.
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2007

2006
Mixed Gates: Leakage Reduction techniques applied to Switches for Networks-on-Chip.
Proceedings of the 2nd International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2006

An Integrated Hardware Solution for MAC Address Translation, MPLS, and Traffic Management in Access Networks.
Proceedings of the LCN 2006, 2006

A distributed object system approach for dynamic reconfiguration.
Proceedings of the 20th International Parallel and Distributed Processing Symposium (IPDPS 2006), 2006

2005
Design Flow on a Chip - An Evolvable HW/SW Platform.
Proceedings of the Second International Conference on Autonomic Computing (ICAC 2005), 2005

Dynamic Reconfiguration with hardwired Networks-on-Chip on future FPGAs.
Proceedings of the 2005 International Conference on Field Programmable Logic and Applications (FPL), 2005

2004
Network-on-Chip basierende Laufzeitsysteme für dynamische rekonfigurierbare Hardware.
Proceedings of the ARCS 2004, 2004


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