Stephen Summerfield

According to our database1, Stephen Summerfield authored at least 12 papers between 1990 and 2002.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2002
Bit-level retiming of high-speed digital recursive filters.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2002, 2002

Wave digital filters using digit serial 3-port adaptors.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2002, 2002

2000
Novel pattern-based power estimation tool with accurate glitch modeling.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000

1999
Area-power-time efficient pipeline-interleaved architectures for wave digital filters.
Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999

1996
Analysis of convolutional encoders and synthesis of rate-2/n Viterbi decoders.
IEEE Trans. Inf. Theory, 1996

1995
On Sigma-Delta Signal Processing Remodulator Complexity.
Proceedings of the 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995, Seattle, Washington, USA, April 30, 1995

1994
Carry Save & Pipelining Techniques for Wave Digital Filters.
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994

Current Mode Techniques for Multiple Valued Arithmetic and Logic.
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994

1993
VLSI implementation of high speed wave digital filters based on a restricted coefficient set.
Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993

Design Methodology of VLSI with Multiple Valued Logic.
Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993

Low Latency Architectures for Wave Digital Filters.
Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993

1990
The design of wave digital filters using fully pipelined bit-level systolic arrays.
J. VLSI Signal Process., 1990


  Loading...