Subhasis Banerjee

According to our database, Subhasis Banerjee authored at least 18 papers between 2003 and 2022.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of five.

2022

Performance Engineering for Deep Learning Adaptation of Seismic Processing Workflow.

Subhasis Banerjee, Aniruddha Panda, Saurabh Chawdhary, Pandu Devarakota

Proceedings of the CODS-COMAD 2022: 5th Joint International Conference on Data Science & Management of Data (9th ACM IKDD CODS and 27th COMAD), Bangalore, India, January 8, 2022

2017

The interaction of last-level-cache mechanisms on modern processors.

Rakhi Hemani, Subhasis Banerjee, Apala Guha

Proceedings of the International Symposium on Memory Systems, 2017

2016

Easy and expressive LLC contention model.

Rakhi Hemani, Subhasis Banerjee, Apala Guha

Proceedings of the International Conference on High Performance Computing & Simulation, 2016

On the applicability of simple cache models for modern processors.

Rakhi Hemani, Subhasis Banerjee, Apala Guha

Proceedings of the 2nd International Conference on Green High Performance Computing, 2016

2014

FlowMaster: Early Eviction of Dead Flow on SDN Switches.

Kalapriya Kannan, Subhasis Banerjee

Proceedings of the Distributed Computing and Networking - 15th International Conference, 2014

Tag-In-Tag: Efficient flow table management in SDN switches.

Subhasis Banerjee, Kalapriya Kannan

Proceedings of the 10th International Conference on Network and Service Management, 2014

SARROD: SPARQL Analyzer and Reordering for Runtime Optimization on Big Data.

Nishtha Tripathi, Subhasis Banerjee

Proceedings of the Big Data Analytics - Third International Conference, 2014

2013

Compact TCAM: Flow Entry Compaction in TCAM for Power Aware SDN.

Kalapriya Kannan, Subhasis Banerjee

Proceedings of the Distributed Computing and Networking, 14th International Conference, 2013

2012

Scissors: Dealing with header redundancies in data centers through SDN.

Kalapriya Kannan, Subhasis Banerjee

Proceedings of the 8th International Conference on Network and Service Management, 2012

2008

On the effectiveness of phase based regression models to trade power and performance using dynamic processor adaptation.

Subhasis Banerjee, G. Surendra, S. K. Nandy

J. Syst. Archit., 2008

2007

Program Phase Directed Dynamic Cache Way Reconfiguration for Power Efficiency.

Subhasis Banerjee, G. Surendra, S. K. Nandy

Proceedings of the 12th Conference on Asia South Pacific Design Automation, 2007

2006

Instruction Reuse in SPEC, media and packet processing benchmarks: A comparative study of power, performance and related microarchitectural optimizations.

G. Surendra, Subhasis Banerjee, S. K. Nandy

J. Embed. Comput., 2006

2004

On the effectiveness of prefetching and reuse in reducing L1 data cache traffic: a case study of Snort.

G. Surendra, Subhasis Banerjee, S. K. Nandy

Proceedings of the 3rd Workshop on Memory Performance Issues, 2004

Power-performance trade-off using pipeline delays.

G. Surendra, Subhasis Banerjee, S. K. Nandy

Proceedings of the 2004 Conference on Asia South Pacific Design Automation: Electronic Design and Solution Fair 2004, 2004

Exploiting program execution phases to trade power and performance for media workload.

Subhasis Banerjee, G. Surendra, S. K. Nandy

Proceedings of the 2004 Conference on Asia South Pacific Design Automation: Electronic Design and Solution Fair 2004, 2004

2003

On the Effectiveness of Flow Aggregation in Improving Instruction Reuse in Network Processing Applications.

G. Surendra, Subhasis Banerjee, S. K. Nandy

Int. J. Parallel Program., 2003

Enhancing Speedup in Network Processing Applications by Exploiting Instruction Reuse with Flow Aggregation.

G. Surendra, Subhasis Banerjee, S. K. Nandy

Proceedings of the 2003 Design, 2003

Enhancing Speedup in Network Processing Applications by Exploiting Instruction Reuse with Flow Aggregation.

G. Surendra, Subhasis Banerjee, S. K. Nandy

Proceedings of the Embedded Software for SoC, 2003