Sunil K. Chappidi

According to our database, Sunil K. Chappidi authored at least 7 papers between 2003 and 2006.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2006

ILP models for simultaneous energy and transient power minimization during behavioral synthesis.

Saraju P. Mohanty, N. Ranganathan, Sunil K. Chappidi

ACM Trans. Design Autom. Electr. Syst., 2006

2004

ILP Models for Energy and Transient Power Minimization During Behavioral Synthesis.

Saraju P. Mohanty, Nagarajan Ranganathan, Sunil K. Chappidi

Proceedings of the 17th International Conference on VLSI Design (VLSI Design 2004), 2004

2003

Peak Power Minimization Through Datapath Scheduling.

Saraju P. Mohanty, N. Ranganathan, Sunil K. Chappidi

Proceedings of the 2003 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2003), 2003

An ILP-based scheduling scheme for energy efficient high performance datapath synthesis.

Saraju P. Mohanty, N. Ranganathan, Sunil K. Chappidi

Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

Transient power minimization through datapath scheduling in multiple supply voltage environment.

Saraju P. Mohanty, Nagarajan Ranganathan, Sunil K. Chappidi

Proceedings of the 2003 10th IEEE International Conference on Electronics, 2003

Power Fluctuation Minimization During Behavioral Synthesis using ILP-Based Datapath Scheduling.

Saraju P. Mohanty, N. Ranganathan, Sunil K. Chappidi

Proceedings of the 21st International Conference on Computer Design (ICCD 2003), 2003

Simultaneous peak and average power minimization during datapath scheduling for DSP processors.

Saraju P. Mohanty, N. Ranganathan, Sunil K. Chappidi

Proceedings of the 13th ACM Great Lakes Symposium on VLSI 2003, 2003