Suryakant Toraskar

According to our database, Suryakant Toraskar authored at least 4 papers between 2021 and 2026.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2026

A SAT-Hard Compound Logic Locking Scheme with Empirical Resistance to Known Structural Attacks.

Sonali Shukla, Govind Rajhans Jadhav, Durgesh Sardan, Suryakant Toraskar, Jaynarayan T. Tudu, Makoto Ikeda, Masahiro Fujita, Virendra Singh

Proceedings of the 29th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2026

2024

MIST: Many-ISA Scheduling Technique for Heterogeneous-ISA Architectures.

Prakhar Diwan, Suryakant Toraskar, Varun Venkitaraman, Nirmal Kumar Boran, Chandramani Chaudhary, Virendra Singh

Proceedings of the 37th International Conference on VLSI Design and 23rd International Conference on Embedded Systems, 2024

2021

Dynamic Optimizations in GPU Using Roofline Model.

Winnie Thomas, Suryakant Toraskar, Virendra Singh

Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

Predictive Warp Scheduling for Efficient Execution in GPGPU.

Abhinish Anand, Winnie Thomas, Suryakant Toraskar, Virendra Singh

Proceedings of the GLSVLSI '21: Great Lakes Symposium on VLSI 2021, 2021