Szu-Yao Hung

According to our database, Szu-Yao Hung authored at least 7 papers between 2013 and 2019.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2019

A 0.5-to-2.5GHz Multi-Output Fractional Frequency Synthesizer with 90fs Jitter and -106dBc Spurious Tones Based on Digital Spur Cancellation.

Szu-Yao Hung, Sudhakar Pamarti

Proceedings of the IEEE International Solid- State Circuits Conference, 2019

2017

Implementation of stable PUFs using gate oxide breakdown.

Wei-Che Wang, Yair Yona, Yizhang Wu, Szu-Yao Hung, Suhas N. Diggavi, Puneet Gupta

Proceedings of the 2017 Asian Hardware Oriented Security and Trust Symposium, 2017

2015

A fast-settling high linearity auto gain control for broadband OFDM-based PLC system.

Kuan-I Wu, Szu-Yao Hung, Shuo-Hong Hung, Charlie Chung-Ping Chen

Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

2014

Current-mode adaptively hysteretic control for buck converters with fast transient response and improved output regulation.

Kuan-I Wu, Shuo-Hong Hung, Shang-Yu Shieh, Bor-Tsang Hwang, Szu-Yao Hung, Charlie Chung-Ping Chen

Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

2013

A 52 dBc MTPR line driver for powerline communication HomePlug AV standard in 0.18-μm CMOS technology.

Pang-Kai Liu, Szu-Yao Hung, Chang-Yi Liu, Min-Han Hsieh, Charlie Chung-Ping Chen

Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

A high dynamic range programmable gain amplifier for HomePlug AV powerline communication system.

Szu-Yao Hung, Kai-Hsiang Chan, Charlie Chung-Ping Chen

Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

A 10-bit current-steering DAC for HomePlug AV2 powerline communication system in 90nm CMOS.

Wei-Sheng Cheng, Min-Han Hsieh, Shuo-Hong Hung, Szu-Yao Hung, Charlie Chung-Ping Chen

Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013