Taehwan Kim

According to our database, Taehwan Kim authored at least 4 papers between 2025 and 2026.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2026

A 15-Gb/s PAM-3 Transceiver With Hybrid Equalization and Time-Domain Decoder for High-Bandwidth-Memory Interfaces.

Hwaseok Shin, Yoonjae Choi, Jincheol Sim, Youngwook Kwon, Seungwoo Park, Seongcheol Kim, Changmin Sim, Junseob So, Seon-Been Lee, Taehwan Kim, Chulwoo Kim

IEEE J. Solid State Circuits, January, 2026

2025

A 28-Gb/s Single-Ended PAM-4 Transceiver With Active-Inductor Equalizer and Amplitude- Detection LSB Decoder for Memory Interfaces.

Hwaseok Shin, Hyoshin Kang, Yoonjae Choi, Jincheol Sim, Jonghyuck Choi, Youngwook Kwon, Seungwoo Park, Seongcheol Kim, Changmin Sim, Junseob So, Taehwan Kim, Chulwoo Kim

IEEE Trans. Very Large Scale Integr. Syst., March, 2025

A 10 Gb/s Single-Ended Receiver Using Time Gap Sense Amplifier for Next-Generation HBM.

Taehwan Kim, Changmin Sim, Seungwoo Park, Jinwoo Park, Seongcheol Kim, Hwaseok Shin, Junseob So, Seonbeen Lee, Youngwook Kwon, Chulwoo Kim

IEEE Trans. Circuits Syst. II Express Briefs, February, 2025

22.5 A 0.3pJ/b 32Gb/s/Pin Single-Ended PAM-4 Receiver with a Delay-Less Capacitive-Feedback Equalizer.

Junseob So, Youngwook Kwon, Seungwoo Park, Seongcheol Kim, Changmin Sim, Hwaseok Shin, Seonbeen Lee, Taehwan Kim, Chulwoo Kim

Proceedings of the IEEE International Solid-State Circuits Conference, 2025