Tero Tikka

According to our database, Tero Tikka authored at least 6 papers between 2006 and 2015.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2015

A 0.8-3 GHz mixer-first receiver with on-chip transformer balun in 65-nm CMOS.

Tero Tikka, Kari Stadius, Jussi Ryynänen, Mikko Kaltiokallio

Proceedings of the ESSCIRC Conference 2015, 2015

All-digital phase-locked loop in 40 nm CMOS for 5.8 Gbps serial link transmitter.

Yury Antonov, Tero Tikka, Kari Stadius, Jussi Ryynänen

Proceedings of the European Conference on Circuit Theory and Design, 2015

2014

A 1.2 - 6.4 GHz clock generator with a low-power DCO and programmable multiplier in 40-nm CMOS.

Tero Tikka, Kari Stadius, Jussi Ryynänen, Martti Voutilainen

Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

2010

30-39GHz 2Gbit/s ring oscillator based OOK-modulator for chip-to-chip communications.

Tero Tikka, Jussi Ryynänen

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

2006

WCDMA multicarrier receiver for base-station applications.

Jussi Ryynänen, Mikko Hotti, Ville Saari, Jarkko Jussila, Arto Malinen, Lauri Sumanen, Tero Tikka, Kari A. I. Halonen

IEEE J. Solid State Circuits, 2006

Design of a high linearity mixer for direct-conversion base-station receiver.

Tero Tikka, Jussi Ryynänen, Mikko Hotti, Kari Halonen

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006