Yury Antonov
Orcid: 0000-0003-2431-2298
According to our database1,
Yury Antonov
authored at least 10 papers
between 2015 and 2020.
Collaborative distances:
Collaborative distances:
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Bibliography
2020
A 3.5-GHz Digitally-Controlled Open-Loop Fractional-N Frequency Divider in 28-nm CMOS.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
2019
A 1.5-1.9-GHz All-Digital Tri-Phasing Transmitter With an Integrated Multilevel Class-D Power Amplifier Achieving 100-MHz RF Bandwidth.
IEEE J. Solid State Circuits, 2019
A Delay-Based LO Phase-Shifting Generator for a 2-5GHz Beamsteering Receiver in 28nm CMOS.
Proceedings of the 45th IEEE European Solid State Circuits Conference, 2019
2018
Proceedings of the 2018 New Generation of CAS, 2018
Proceedings of the 16th IEEE International New Circuits and Systems Conference, 2018
Full-Duplex Wireless Transceiver Self-Interference Cancellation Through FD-SOI Buried-Gate Signaling.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
Proceedings of the 10th International Congress on Ultra Modern Telecommunications and Control Systems and Workshops, 2018
2017
A charge limiting and redistribution method for delay line locking in multi-output clock generation.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017
Open-loop all-digital delay line with on-chip calibration via self-equalizing delays.
Proceedings of the 2017 European Conference on Circuit Theory and Design, 2017
2015
Proceedings of the European Conference on Circuit Theory and Design, 2015