Thomas Hiscock

According to our database1, Thomas Hiscock authored at least 16 papers between 2017 and 2024.

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Bibliography

2024
A Study of Soft Analytical Side-Channel Attacks on Secure Hash Algorithms.
IACR Cryptol. ePrint Arch., 2024

2023
Side-channel disassembly on a System-on-Chip: A practical feasibility study.
Microprocess. Microsystems, 2023

Cache Side-Channel Attacks Through Electromagnetic Emanations of DRAM Accesses.
IACR Cryptol. ePrint Arch., 2023

Code Polymorphism Meets Code Encryption: Confidentiality and Side-Channel Protection of Software Components.
CoRR, 2023

2022
Fit The Joint Moments.
IACR Cryptol. ePrint Arch., 2022

Fit the Joint Moments: How to Attack Any Masking Scheme.
IEEE Access, 2022

Towards Fine-grained Side-Channel Instruction Disassembly on a System-on-Chip.
Proceedings of the 25th Euromicro Conference on Digital System Design, 2022

2021
Scramble Cache: An Efficient Cache Architecture for Randomized Set Permutation.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

2020
Confidaent: Control FLow protection with Instruction and Data Authenticated Encryption.
Proceedings of the 23rd Euromicro Conference on Digital System Design, 2020

2019
Lightweight instruction-level encryption for embedded processors using stream ciphers.
Microprocess. Microsystems, 2019

Adapting machine-learning algorithms to design gene circuits.
BMC Bioinform., 2019

Adaptive Masking: a Dynamic Trade-off between Energy Consumption and Hardware Security.
Proceedings of the 37th IEEE International Conference on Computer Design, 2019

A Bit-Level Approach to Side Channel Based Disassembling.
Proceedings of the Smart Card Research and Advanced Applications, 2019

2018
Energy-efficient Masking of the Trivium Stream Cipher.
Proceedings of the 25th IEEE International Conference on Electronics, Circuits and Systems, 2018

On the Design of a Processor Working Over Encrypted Data.
Proceedings of the 21st Euromicro Conference on Digital System Design, 2018

2017
Lightweight Software Encryption for Embedded Processors.
Proceedings of the Euromicro Conference on Digital System Design, 2017


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