Thomas Tellier

According to our database, Thomas Tellier authored at least 4 papers between 1999 and 2004.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2004

Substrate coupling in digital circuits in mixed-signal smart-power systems.

Radu M. Secareanu, Scott Warner, Scott Seabridge, Cathie Burke, Juan Becerra, Thomas E. Watrobski, Christopher Morton, William Staub, Thomas Tellier, Ivan S. Kourtev, Eby G. Friedman

IEEE Trans. Very Large Scale Integr. Syst., 2004

2001

A comparative study of the behavior of NMOS and CMOS digital circuits under substrate noise.

Radu M. Secareanu, Scott Warner, Scott Seabridge, Cathie Burke, Thomas E. Watrobski, Christopher Morton, William Staub, Thomas Tellier, Eby G. Friedman

Proceedings of the 2001 8th IEEE International Conference on Electronics, 2001

2000

Physical design to improve the noise immunity of digital circuits in a mixed-signal smart-power system.

Radu M. Secareanu, Scott Warner, Scott Seabridge, Cathie Burke, Thomas E. Watrobski, Christopher Morton, William Staub, Thomas Tellier, Eby G. Friedman

Proceedings of the IEEE International Symposium on Circuits and Systems, 2000

1999

Noise Immunity of Digital Circuits in Mixed-Signal Smart Power Systems.

Radu M. Secareanu, Ivan S. Kourtev, Juan Becerra, Thomas E. Watrobski, Christopher Morton, William Staub, Thomas Tellier, Eby G. Friedman

Proceedings of the 9th Great Lakes Symposium on VLSI (GLS-VLSI '99), 1999