Ivan S. Kourtev

According to our database, Ivan S. Kourtev authored at least 24 papers between 1999 and 2009.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2009

Multi-Phase Rotary Clock Synchronization of Level-Sensitive Circuits.

Baris Taskin, Ivan S. Kourtev

J. Circuits Syst. Comput., 2009

2006

Delay Insertion Method in Clock Skew Scheduling.

Baris Taskin, Ivan S. Kourtev

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006

Technology mapping for Field Programmable Gate Arrays using Content-Addressable Memory (CAM).

Joshua M. Lucas, Raymond Hoare, Ivan S. Kourtev, Alex K. Jones

Microprocess. Microsystems, 2006

Technology Mapping for Field Programmable Gate Arrays using Content-Addressable Memory (CAM).

Raymond R. Hoare, Ivan S. Kourtev, Alex K. Jones

Proceedings of the 14th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2006), 2006

2004

Linearization of the timing analysis and optimization of level-sensitive digital synchronous circuits.

Baris Taskin, Ivan S. Kourtev

IEEE Trans. Very Large Scale Integr. Syst., 2004

Substrate coupling in digital circuits in mixed-signal smart-power systems.

Radu M. Secareanu, Scott Warner, Scott Seabridge, Cathie Burke, Juan Becerra, Thomas E. Watrobski, Christopher Morton, William Staub, Thomas Tellier, Ivan S. Kourtev, Eby G. Friedman

IEEE Trans. Very Large Scale Integr. Syst., 2004

Time borrowing and clock skew scheduling effects on multi-phase level-sensitive circuits.

Baris Taskin, Ivan S. Kourtev

Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

Performance metrics for asynchronous digital circuits applicable to computer-aided design.

Rajani Parthasarthy, Ivan S. Kourtev

Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

Performance improvement of edge-triggered sequential circuits.

Baris Taskin, Ivan S. Kourtev

Proceedings of the 2004 11th IEEE International Conference on Electronics, 2004

Advanced timing of level-sensitive sequential circuits.

Baris Taskin, Ivan S. Kourtev

Proceedings of the 2004 11th IEEE International Conference on Electronics, 2004

LURU: global-scope FPGA technology mapping with content-addressable memories.

Joshua M. Lucas, Raymond R. Hoare, Ivan S. Kourtev, Alex K. Jones

Proceedings of the 2004 11th IEEE International Conference on Electronics, 2004

A 64-way VLIW/SIMD FPGA architecture and design flow.

Alex K. Jones, Raymond Hoare, Ivan S. Kourtev, Joshua Fazekas, Dara Kusic, John Foster, Sedric Boddie, Ahmed Muaydh

Proceedings of the 2004 11th IEEE International Conference on Electronics, 2004

Efficient CAD development for emerging technologies using Objective-C and Cocoa.

Bryan A. Brady, Alex K. Jones, Ivan S. Kourtev

Proceedings of the 2004 11th IEEE International Conference on Electronics, 2004

2003

The Sandbox Design Experience Course.

Herman Schmit, Thomas Kroll, Max Khusid, Ivan S. Kourtev, Narayanan Vijaykrishnan, David L. Landis

Proceedings of the 2003 International Conference on Microelectronics Systems Education, 2003

Short Courses in System-on-a-Chip (SoC) Design.

Ivan S. Kourtev, Raymond R. Hoare, Steven P. Levitan, Tom Cain, Bruce R. Childers, Donald M. Chiarulli, David L. Landis

Proceedings of the 2003 International Conference on Microelectronics Systems Education, 2003

Reduced dynamic swing domino logic.

Roy Mader, Ivan S. Kourtev

Proceedings of the 13th ACM Great Lakes Symposium on VLSI 2003, 2003

2002

Demonstration of Speed and Power Enhancements on an Industrial Circuit Through Application of Clock Skew Scheduling.

Dimitrios Velenis, Kevin T. Tang, Ivan S. Kourtev, Victor Adler, Franklin Baez, Eby G. Friedman

J. Circuits Syst. Comput., 2002

Performance optimization of single-phase level-sensitive circuits using time borrowing and non-zero clock skew.

Baris Taskin, Ivan S. Kourtev

Proceedings of the 8th ACM/IEEE International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems, 2002

Large scale clock skew scheduling techniques for improved reliability of digital synchronous VLSI circuits.

Roy Mader, Eby G. Friedman, Ami Litman, Ivan S. Kourtev

Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

2001

Demonstration of speed enhancements on an industrial circuit through application of non-zero clock skew scheduling.

Dimitrios Velenis, Kevin T. Tang, Ivan S. Kourtev, Victor Adler, Franklin Baez, Eby G. Friedman

Proceedings of the 2001 8th IEEE International Conference on Electronics, 2001

A single latch, high speed double-edge triggered flip-flop (DETFF).

Troy A. Johnson, Ivan S. Kourtev

Proceedings of the 2001 8th IEEE International Conference on Electronics, 2001

1999

System Timing.

Ivan S. Kourtev, Eby G. Friedman

Proceedings of the VLSI Handbook., 1999

Clock skew scheduling for improved reliability via quadratic programming.

Ivan S. Kourtev, Eby G. Friedman

Proceedings of the 1999 IEEE/ACM International Conference on Computer-Aided Design, 1999

Noise Immunity of Digital Circuits in Mixed-Signal Smart Power Systems.

Radu M. Secareanu, Ivan S. Kourtev, Juan Becerra, Thomas E. Watrobski, Christopher Morton, William Staub, Thomas Tellier, Eby G. Friedman

Proceedings of the 9th Great Lakes Symposium on VLSI (GLS-VLSI '99), 1999