Ting Yi

According to our database1, Ting Yi authored at least 17 papers between 2010 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

On csauthors.net:

Bibliography

2023
A 1.9μVrms 7.7ppm/°C ADC Reference with 20mA Output Current and Single-Trim Inaccuracy of ±0.03%(3σ) from -40°C to 125°C.
Proceedings of the 49th IEEE European Solid State Circuits Conference, 2023

2021
Investigating Online Learning Experience of Chinese University Students during the COVID-19.
Proceedings of the ICETC 2021: 13th International Conference on Education Technology and Computers, Wuhan, China, October 22, 2021

A Review and Perspective on Electrode Patch-Based Fetal ECG Monitoring ASIC.
Proceedings of the 14th IEEE International Conference on ASIC, 2021

High Precision AFE Design Methodology for Wearable EEG Acquisition.
Proceedings of the 14th IEEE International Conference on ASIC, 2021

High-Input-Impedance Amplifiers Design for Dry-Electrode Biopotential Acquisition: A Review.
Proceedings of the 14th IEEE International Conference on ASIC, 2021

A Review of PPG/NIRS Acquisition ASIC and System.
Proceedings of the 14th IEEE International Conference on ASIC, 2021

2019
A 2-D Predistortion Based on Profile Inversion for Fully Digital Cartesian Transmitter.
IEEE Trans. Very Large Scale Integr. Syst., 2019

A wide range and high resolution two-step TDC for millimeter-wave band ADPLL.
Proceedings of the 13th IEEE International Conference on ASIC, 2019

2017
In-bed patient motion and pose analysis using depth videos for pressure ulcer prevention.
Proceedings of the 2017 IEEE International Conference on Image Processing, 2017

A 1.2V output RF energy harvester with a harvesting-efficiency tracking circuit.
Proceedings of the 12th IEEE International Conference on ASIC, 2017

2015
A 14-bit 2-GS/s DAC with a programmable interpolation filter.
Proceedings of the 2015 IEEE 11th International Conference on ASIC, 2015

2013
1-V Low-Power Programmable Rail-to-Rail Operational Amplifier With Improved Transconductance Feedback Technique.
IEEE Trans. Very Large Scale Integr. Syst., 2013

An energy-efficient 5-MHz to 20-MHz, 12-bit reconfigurable continuous-time ΣΔ modulator for 4G-LTE application.
Proceedings of the International Symposium on Low Power Electronics and Design (ISLPED), 2013

2011
A low-power triple-mode sigma-delta DAC for reconfigurable (WCDMA/TD-SCDMA/GSM) transmitters.
Proceedings of the 16th Asia South Pacific Design Automation Conference, 2011

A 14-bit 2-GS/s DAC with SFDR>70dB up to 1-GHz in 65-nm CMOS.
Proceedings of the 2011 IEEE 9th International Conference on ASIC, 2011

VLSI implementation of high-speed low power decimation filter for LTE sigma-delta A/D converter application.
Proceedings of the 2011 IEEE 9th International Conference on ASIC, 2011

2010
A Reconfigurable Analog Processor Based on FPAA with Coarse-Grained, Heterogeneous Configurable Analog Blocks.
Proceedings of the International Conference on Field Programmable Logic and Applications, 2010


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