Tobias Schüle

According to our database1, Tobias Schüle authored at least 28 papers between 2001 and 2019.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Bibliography

2019
Evaluating Dynamic Task Scheduling in a Task-Based Runtime System for Heterogeneous Architectures.
Proceedings of the Architecture of Computing Systems - ARCS 2019, 2019

2018
Tool-based interactive software parallelization: a case study.
Proceedings of the 40th International Conference on Software Engineering: Software Engineering in Practice, 2018

2016
A Visualization Framework for Parallelization.
Proceedings of the 2016 IEEE Working Conference on Software Visualization, 2016

Exploring Task Parallelism for Heterogeneous Systems Using Multicore Task Management API.
Proceedings of the Euro-Par 2016: Parallel Processing Workshops, 2016

2015
Parceive: Interactive parallelization based on dynamic analysis.
Proceedings of the 6th IEEE International Workshop on Program Comprehension through Dynamic Analysis, 2015

2013
Self-timed Scheduling and Execution of Nonlinear Pipelines with Parallel Stages.
Proceedings of the Multicore Software Engineering, Performance, and Tools, 2013

2012
Work Stealing Strategies for Parallel Stream Processing in Soft Real-Time Systems.
Proceedings of the Architecture of Computing Systems - ARCS 2012 - 25th International Conference, Munich, Germany, February 28, 2012

2011
Efficient Parallel Execution of Streaming Applications on Multi-core Processors.
Proceedings of the 19th International Euromicro Conference on Parallel, 2011

2009
A Coordination Language for Programming Embedded Multi-Core Systems.
Proceedings of the 2009 International Conference on Parallel and Distributed Computing, 2009

2007
Verification of infinite state systems using Presburger arithmetic.
PhD thesis, 2007

Bounded model checking of infinite state systems.
Formal Methods in System Design, 2007

Formal verification of safety behaviours of the outdoor robot ravon.
Proceedings of the ICINCO 2007, 2007

From Model-Based Design to Formal Verification of Adaptive Embedded Systems.
Proceedings of the Formal Methods and Software Engineering, 2007

2006
A Verified Compiler for Synchronous Programs with Local Declarations.
Electron. Notes Theor. Comput. Sci., 2006

A Framework for Verifying and Implementing Embedded Systems.
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2006

Verifying the adaptation behavior of embedded systems.
Proceedings of the 2006 international workshop on Self-adaptation and self-managing systems, 2006

Verification of Data Paths Using Unbounded Integers: Automata Strike Back.
Proceedings of the Hardware and Software, 2006

2005
Three-valued logic in bounded model checking.
Proceedings of the 3rd ACM & IEEE International Conference on Formal Methods and Models for Co-Design (MEMOCODE 2005), 2005

Maximal Causality Analysis.
Proceedings of the Fifth International Conference on Application of Concurrency to System Design (ACSD 2005), 2005

2004
Global vs. Local Model Checking: A Comparison of Verification Techniques for Infinite State Systems.
Proceedings of the 2nd International Conference on Software Engineering and Formal Methods (SEFM 2004), 2004

Bounded model checking of infinite state systems: exploiting the automata hierarchy.
Proceedings of the 2nd ACM & IEEE International Conference on Formal Methods and Models for Co-Design (MEMOCODE 2004), 2004

Global vs. Local Model Checking of Infinite State Systems.
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2004

Abstraction of assembler programs for symbolic worst case execution time analysis.
Proceedings of the 41th Design Automation Conference, 2004

Causality analysis of synchronous programs with delayed actions.
Proceedings of the 2004 International Conference on Compilers, 2004

2003
Exact Runtime Analysis Using Automata-Based Symbolic Simulation.
Proceedings of the 1st ACM & IEEE International Conference on Formal Methods and Models for Co-Design (MEMOCODE 2003), 2003

2002
Symbolic Model Checking by Automata Based Set Representation.
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2002

2001
Test Scheduling for Minimal Energy Consumption under Power Constraints.
Proceedings of the 19th IEEE VLSI Test Symposium (VTS 2001), Test and Diagnosis in a Nanometric World, 29 April, 2001

Scheduling tests for low power built-in self-test.
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001


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