Tomasz Grzes

Orcid: 0000-0002-6039-6153

According to our database1, Tomasz Grzes authored at least 24 papers between 2007 and 2022.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Bibliography

2022
FPGA supported rough set reduct calculation for big datasets.
J. Intell. Inf. Syst., 2022

Survey on dialogue systems including slavic languages.
Neurocomputing, 2022

2021
Hardware Rough Set Processor Parallel Architecture in FPGA for Finding Core in Big Datasets.
J. Artif. Intell. Soft Comput. Res., 2021

Development of Digital Competences of Elementary School Teachers with a Life-Long Learning Approach.
Proceedings of the Computer Information Systems and Industrial Management, 2021

2020
Breadth search strategies for finding minimal reducts: towards hardware implementation.
Neural Comput. Appl., 2020

Parallelized Hardware Rough Set Processor Architecture in FPGA for Core Calculation in Big Datasets.
Proceedings of the 16th International Conference on Control, 2020

The Synthesis Method of High-Speed Finite State Machines in FPGA.
Proceedings of the Computer Information Systems and Industrial Management, 2020

2019
Hardware Implementation on Field Programmable Gate Array of Two-Stage Algorithm for Rough Set Reduct Generation.
Proceedings of the Rough Sets - International Joint Conference, 2019

Lossless and Lossy Audio Codecs for Low-Performance Microcontrollers for Use in IoT.
Proceedings of the Computer Information Systems and Industrial Management, 2019

Two FPGA Devices in the Problem of Finding Minimal Reducts.
Proceedings of the Computer Information Systems and Industrial Management, 2019

2018
High-Speed Finite State Machine Design by State Splitting.
Proceedings of the Contemporary Complex Systems and Their Dependability, 2018

Multiple Codes State Assignment and Code Length Reduction for Power Minimization of Finite State Machines.
Proceedings of the Computer Information Systems and Industrial Management, 2018

2017
Hardware Supported Rule-Based Classification on Big Datasets.
Proceedings of the Rough Sets - International Joint Conference, 2017

2016
Rough Sets Based LEM2 Rules Generation Supported by FPGA.
Fundam. Informaticae, 2016

Core for Large Datasets: Rough Sets on FPGA.
Fundam. Informaticae, 2016

Hardware Supported Rough Sets Based Rules Generation for Big Datasets.
Proceedings of the Computer Information Systems and Industrial Management, 2016

2015
Computation of Cores in Big Datasets: An FPGA Approach.
Proceedings of the Rough Sets and Knowledge Technology - 10th International Conference, 2015

Minimization Method of Finite State Machines for Low Power Design.
Proceedings of the 2015 Euromicro Conference on Digital System Design, 2015

2014
FPGA in Rough-Granular Computing: Reduct Generation.
Proceedings of the 2014 IEEE/WIC/ACM International Joint Conferences on Web Intelligence (WI) and Intelligent Agent Technologies (IAT), Warsaw, Poland, August 11-14, 2014, 2014

Generating Core in Rough Set Theory: Design and Implementation on FPGA.
Proceedings of the Rough Sets and Intelligent Systems Paradigms, 2014

2013
The First Step Toward Processor for Rough Set Methods.
Fundam. Informaticae, 2013

FPGA in Rough Set Based Core and Reduct Computation.
Proceedings of the Rough Sets and Knowledge Technology - 8th International Conference, 2013

A Scalable Distributed Architecture for Emulating Unreliable Networks for Testing Multimedia Systems.
Proceedings of the Image Processing and Communications Challenges 5, 2013

2007
FSM State Assignment Methods for Low-Power Design.
Proceedings of the 6th International Conference on Computer Information Systems and Industrial Management Applications, 2007


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