Tsai-Chin Yu

According to our database, Tsai-Chin Yu authored at least 1 paper in 2018.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2018

A 50-Gb/s Quarter-Rate Voltage-Mode Transmitter with Three-Tap FFE in 40-nm CMOS.

Pen-Jui Peng, Yan-Ting Chen, Chao-Hsuan Chen, Sheng-Tsung Lai, Hsiang-En Huang, Ho-Hsuan Lu, Tsai-Chin Yu

Proceedings of the 44th IEEE European Solid State Circuits Conference, 2018