Tse-Wei Chen
Affiliations:- Canon Inc., Tokyo, Japan
- University of Tokyo, VLSI Design and Education Center (VDEC), Japan
- Nagoya University, Graduate School of Information Science, Japan
- National Taiwan University (NTU), Graduate Institute of Electronics Engineering (GIEE), Taipei, Taiwan
According to our database1,
Tse-Wei Chen
authored at least 38 papers
between 2007 and 2021.
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Bibliography
2021
Proceedings of the MM '21: ACM Multimedia Conference, Virtual Event, China, October 20, 2021
CASSOD-Net: Cascaded and Separable Structures of Dilated Convolution for Embedded Vision Systems and Applications.
Proceedings of the IEEE Conference on Computer Vision and Pattern Recognition Workshops, 2021
2020
Proceedings of the Computer Vision - ECCV 2020 Workshops, 2020
Hardware Architecture of Embedded Inference Accelerator and Analysis of Algorithms for Depthwise and Large-Kernel Convolutions.
Proceedings of the Computer Vision - ECCV 2020 Workshops, 2020
BAMSProd: A Step towards Generalizing the Adaptive Optimization Methods to Deep Binary Model.
Proceedings of the 2020 IEEE/CVF Conference on Computer Vision and Pattern Recognition, 2020
Proceedings of the Computer Vision - ACCV 2020 - 15th Asian Conference on Computer Vision, Kyoto, Japan, November 30, 2020
2019
Knowledge Representing: Efficient, Sparse Representation of Prior Knowledge for Knowledge Distillation.
Proceedings of the IEEE Conference on Computer Vision and Pattern Recognition Workshops, 2019
Proceedings of the IEEE Conference on Computer Vision and Pattern Recognition Workshops, 2019
Condensation-Net: Memory-Efficient Network Architecture With Cross-Channel Pooling Layers and Virtual Feature Maps.
Proceedings of the IEEE Conference on Computer Vision and Pattern Recognition Workshops, 2019
2018
Proceedings of the 2018 IEEE Conference on Computer Vision and Pattern Recognition Workshops, 2018
2014
Proceedings of the 2014 IEEE Workshop on Signal Processing Systems, 2014
2013
Design and Implementation of Low-Power Hardware Architecture With Single-Cycle Divider for On-Line Clustering Algorithm.
IEEE Trans. Circuits Syst. I Regul. Pap., 2013
2012
Visual Vocabulary Processor Based on Binary Tree Architecture for Real-Time Object Recognition in Full-HD Resolution.
IEEE Trans. Very Large Scale Integr. Syst., 2012
Preference-Aware View Recommendation System for Scenic Photos Based on Bag-of-Aesthetics-Preserving Features.
IEEE Trans. Multim., 2012
A 52 mW Full HD 160-Degree Object Viewpoint Recognition SoC With Visual Vocabulary Processor for Wearable Vision Applications.
IEEE J. Solid State Circuits, 2012
Dual-stage hardware architecture of on-line clustering with high-throughput parallel divider for low-power signal processing.
Proceedings of the 2012 IEEE Symposium on Low-Power and High-Speed Chips, 2012
2011
Flexible Hardware Architecture of Hierarchical K-Means Clustering for Large Cluster Number.
IEEE Trans. Very Large Scale Integr. Syst., 2011
Photo Retrieval Based on Spatial Layout with Hardware Acceleration for Mobile Devices.
IEEE Trans. Mob. Comput., 2011
Power-Efficient Hardware Architecture of K-Means Clustering With Bayesian-Information-Criterion Processor for Multimedia Processing Applications.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2011
Proceedings of the 19th International Conference on Multimedia 2011, Scottsdale, AZ, USA, November 28, 2011
2010
IEEE Trans. Very Large Scale Integr. Syst., 2010
Tera-Scale Performance Machine Learning SoC (MLSoC) With Dual Stream Processor Architecture for Multimedia Content Analysis.
IEEE J. Solid State Circuits, 2010
Proceedings of the IEEE International Solid-State Circuits Conference, 2010
Proceedings of the International Conference on Image Processing, 2010
2009
IEEE Trans. Circuits Syst. Video Technol., 2009
Proceedings of the 12th IEEE International Conference on Computer Vision Workshops, 2009
Bandwidth adaptive hardware architecture of K-Means clustering for intelligent video processing.
Proceedings of the IEEE International Conference on Acoustics, 2009
Tera-scale performance machine learning SoC with dual stream processor architecture for multimedia content analysis.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2009
2008
Proceedings of the Advances in Multimedia Information Processing, 2008
Proceedings of the Advances in Multimedia Information Processing, 2008
High Performance Hardware Architecture of Linear Filters for Intelligent Video Processing.
Proceedings of the Advances in Multimedia Information Processing, 2008
Fast image segmentation based on K-Means clustering with histograms in HSV color space.
Proceedings of the International Workshop on Multimedia Signal Processing, 2008
Architectural analyses of K-Means silicon intellectual property for image segmentation.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008
Fast fingertip positioning by combining particle filtering with particle random diffusion.
Proceedings of the 2008 IEEE International Conference on Multimedia and Expo, 2008
2007
Efficient Face Detection with Segmentation and Feature-based Face Scoring in Surveillance Systems.
Proceedings of the IEEE 9th Workshop on Multimedia Signal Processing, 2007
Proceedings of the Ninth IEEE International Symposium on Multimedia, 2007
Motion Adaptive Spatio-Temporal Gaussian Noise Reduction Filter for Double-Shot Images.
Proceedings of the 2007 IEEE International Conference on Multimedia and Expo, 2007
Robust Video Object Segmentation Based on K-Means Background Clustering and Watershed in Ill-Conditioned Surveillance Systems.
Proceedings of the 2007 IEEE International Conference on Multimedia and Expo, 2007