Yuan-Hung Chung
According to our database1,
Yuan-Hung Chung
authored at least 7 papers
between 2009 and 2021.
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Bibliography
2021
Session 6 Overview: High-Performance Receivers and Transmitters for Sub-6GHz Radios Wireless Subcommittee.
Proceedings of the IEEE International Solid-State Circuits Conference, 2021
2017
7.1 An 802.11ac dual-band reconfigurable transceiver supporting up to four VHT80 spatial streams with 116fsrms-jitter frequency synthesizer and integrated LNA/PA delivering 256QAM 19dBm per stream achieving 1.733Gb/s PHY rate.
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017
A reconfigurable dual-band WiFi/BT combo transceiver with integrated 2G/BT SP3T, LNA/PA achieving concurrent receiving and wide dynamic range transmitting in 40nm CMOS.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2017
2015
A dual-band 802.11abgn/ac transceiver with integrated PA and T/R switch in a digital noise controlled SoC.
Proceedings of the 2015 IEEE Custom Integrated Circuits Conference, 2015
2013
A 0.27mm<sup>2</sup> 13.5dBm 2.4GHz all-digital polar transmitter using 34%-efficiency Class-D DPA in 40nm CMOS.
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013
2012
A 4-in-1 (WiFi/BT/FM/GPS) connectivity SoC with enhanced co-existence performance in 65nm CMOS.
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012
2009
IEEE J. Solid State Circuits, 2009