Vaithiyanathan Dhandapani
Orcid: 0000-0001-5235-2620Affiliations:
- National Institute of Technology Delhi, Department of Electronics and Communication Engineering, New Delhi, India
 
  According to our database1,
  Vaithiyanathan Dhandapani
  authored at least 23 papers
  between 2014 and 2025.
  
  
Collaborative distances:
Collaborative distances:
Timeline
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Online presence:
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    on orcid.org
 
On csauthors.net:
Bibliography
  2025
Performance analysis of 1D-to-2D array conversion for priority encoders in post-layout design.
    
  
    Int. J. Syst. Assur. Eng. Manag., October, 2025
    
  
  2024
High speed and area efficient coded input BCSM shared LUT-based FIR filter architecture.
    
  
    Int. J. Syst. Assur. Eng. Manag., July, 2024
    
  
Design insights into a junctionless nanosheet FET (JL-NSFET) for switching and Analog/RF applications: Device to circuit level assessment.
    
  
    Microelectron. J., 2024
    
  
Comparative Study Of GAA-JL Transistor With And Without FE Material For Hydrogen Gas Sensing.
    
  
    Proceedings of the 28th International Symposium on VLSI Design and Test, 2024
    
  
  2023
    Int. J. Syst. Assur. Eng. Manag., October, 2023
    
  
Underwater image enhancement by modified color correction and adaptive Look-Up-Table with edge-preserving filter.
    
  
    Signal Process. Image Commun., April, 2023
    
  
    Proceedings of the Big Data Analytics in Astronomy, Science, and Engineering, 2023
    
  
A1RL: Approximate 1-Row-LUT-Based Low-Power Signed Multipliers for DSP and Machine Learning Applications on FPGAs.
    
  
    Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2023
    
  
  2022
A Partially Static High Frequency 18T Hybrid Topological Flip-Flop Design for Low Power Application.
    
  
    IEEE Trans. Circuits Syst. II Express Briefs, 2022
    
  
FPGA based intelligent embedded system for predicting the productivity using fuzzy logic.
    
  
    Sustain. Comput. Informatics Syst., 2022
    
  
Design and Analysis of Soft Error Rate in FET/CNTFET Based Radiation Hardened SRAM Cell.
    
  
    Sensors, 2022
    
  
Underwater image enhancement by color correction and color constancy via Retinex for detail preserving.
    
  
    Comput. Electr. Eng., 2022
    
  
  2021
FPGA based effective agriculture productivity prediction system using fuzzy support vector machine.
    
  
    Math. Comput. Simul., 2021
    
  
Signal Processing and Classification for Electroencephalography Based Motor Imagery Brain Computer Interface.
    
  
    J. Medical Imaging Health Informatics, 2021
    
  
Underwater image enhancement by combining color constancy and dehazing based on depth estimation.
    
  
    Neurocomputing, 2021
    
  
Design and analysis of ultra-low power 18T adaptive data track flip-flop for high-speed application.
    
  
    Int. J. Circuit Theory Appl., 2021
    
  
Internet of Things Integrated with Multi-level Authentication for Secured IoT Data Stream Through TLS/SSL Layer.
    
  
    Proceedings of the Big-Data-Analytics in Astronomy, Science, and Engineering, 2021
    
  
  2020
    J. Medical Imaging Health Informatics, 2020
    
  
Performance analysis of dynamic CMOS circuit based on node-discharger and twist-connected transistors.
    
  
    IET Comput. Digit. Tech., 2020
    
  
Performance Analysis of 8-Point Approximate DCT Architecture Using Conventional and Hybrid Adders.
    
  
    Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2020
    
  
  2018
Fuzzy decision support system for improving the crop productivity and efficient use of fertilizers.
    
  
    Comput. Electron. Agric., 2018
    
  
  2014
    EURASIP J. Image Video Process., 2014
    
  
    EURASIP J. Adv. Signal Process., 2014