Valérie Bertin

According to our database1, Valérie Bertin authored at least 8 papers between 2000 and 2021.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2021
FIRECAP: Fail-Reason Capturing hardware module for a RISC-V based System on a Chip.
Proceedings of the 36th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2021

2013
Designing tightly-coupled extension units for the STxP70 processor.
Proceedings of the Design, Automation and Test in Europe, 2013

2005
Jahuel: A Formal Framework for Software Synthesis.
Proceedings of the Formal Methods and Software Engineering, 2005

Modelling, Analysis and Parallel Implementation of an On-line Video Encoder.
Proceedings of the 1st International Conference on Distributed Frameworks for Multimedia Applications (DFMA 2005), 2005

2002
FlexCC2: An Optimizing Retargetable C Compiler for DSP Processors.
Proceedings of the Embedded Software, Second International Conference, 2002

2001
TAXYS=Esterel+Kronos. A tool for verifying real-time properties of embedded systems.
Proceedings of the 40th IEEE Conference on Decision and Control, 2001

2000
Towards validated real-time software.
Proceedings of the 12th Euromicro Conference on Real-Time Systems (ECRTS 2000), 2000

Efficient compilation of ESTEREL for real-time embedded systems.
Proceedings of the 2000 International Conference on Compilers, 2000


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