Vanderlei Moraes Rodrigues

According to our database, Vanderlei Moraes Rodrigues authored at least 7 papers between 1994 and 2000.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2000

Using the ACL2 Theorem Prover to Reason about VHDL Components.

Vanderlei Moraes Rodrigues, Dominique Borrione, Philippe Georgelin

RITA, 2000

Introdução a Métodos Formais: Especificação, Semântica e Verificação de Sistemas Concorrentes.

David Déharbe, Anamaria Martins Moreira, Leila Ribeiro, Vanderlei Moraes Rodrigues

RITA, 2000

A logic for synchronous transitions with dynamic conflict resolution.

Vanderlei Moraes Rodrigues, Flávio Rech Wagner

CLEI Electron. J., 2000

An ACL2 Model of VHDL for Symbolic Simulation and Formal Verification.

Vanderlei Moraes Rodrigues, Dominique Borrione, Philippe Georgelin

Proceedings of the 13th Annual Symposium on Integrated Circuits and Systems Design, 2000

1999

A Logic to Specify and Verify Synchronous Transitions.

Vanderlei Moraes Rodrigues, Flávio Rech Wagner

Proceedings of the 3rd Irish Workshop on Formal Methods, Galway, Ireland, July 1999, 1999

1998

A Temporal Logic for Data-Flow VHDL.

Vanderlei Moraes Rodrigues, Flávio Rech Wagner

Proceedings of the 11th Annual Symposium on Integrated Circuits Design, 1998

1994

Inspecting continuations.

Antônio Carlos da Rocha Costa, Vanderlei Moraes Rodrigues

SIGACT News, 1994