Vasileios Gerakis

Orcid: 0000-0001-6840-9935

According to our database1, Vasileios Gerakis authored at least 8 papers between 2014 and 2021.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2021
A Low-Cost, Robust and Tolerant, Digital Scheme for Post-Bond Testing and Diagnosis of TSVs.
J. Electron. Test., 2021

2020
An Alternative Post-bond Testing Method for TSVs.
Proceedings of the 9th International Conference on Modern Circuits and Systems Technologies, 2020

2017
Oscillation-based technique for post-bond parallel testing and diagnosis of multiple TSVs.
Proceedings of the 27th International Symposium on Power and Timing Modeling, 2017

Oscillation-based technique for TSV post-bond test considerations.
Proceedings of the 6th International Conference on Modern Circuits and Systems Technologies, 2017

2015
Fault modeling and testing of through silicon via interconnections.
Proceedings of the 21st IEEE International On-Line Testing Symposium, 2015

Modeling the Coupling through Substrate for Frequencies up to 100GHz.
Proceedings of the 18th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2015

2014
Substrate coupling noise considerations for frequencies up to 100GHz.
Proceedings of the 21st International Conference Mixed Design of Integrated Circuits and Systems, 2014

Modeling and analysis of cracked through silicon via (TSV) interconnections.
Proceedings of the 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2014


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