Veeresh Babu Vulligaddala

According to our database1, Veeresh Babu Vulligaddala authored at least 7 papers between 2015 and 2020.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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Article 
PhD thesis 
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Links

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Bibliography

2020
A 7-Cell, Stackable, Li-Ion Monitoring and Active/Passive Balancing IC With In-Built Cell Balancing Switches for Electric and Hybrid Vehicles.
IEEE Trans. Ind. Informatics, 2020

Regression Based Mixed Signal Verification of an Ambient Light Sensor Interface.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

2018
A Digitally Calibrated Bandgap Reference With 0.06% Error for Low-Side Current Sensing Application.
IEEE J. Solid State Circuits, 2018

2017
A Switched-Capacitor Amplifier with True Rail-to-Rail Input Range without Using a Rail-to-Rail Op-Amp.
Proceedings of the 30th International Conference on VLSI Design and 16th International Conference on Embedded Systems, 2017

CMOS mixed signal SoC for low-side current sensing.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

2016
Bootstrapped leakage suppression switch for switched capacitor circuits with zero input common mode.
Proceedings of the IEEE 59th International Midwest Symposium on Circuits and Systems, 2016

2015
A Wide Dynamic-Range Low-Power Signal Conditioning Circuit for Low-Side Current Sensing Application.
Proceedings of the 28th International Conference on VLSI Design, 2015


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