Vidya R. Suryanarayana

According to our database1, Vidya R. Suryanarayana authored at least 2 papers in 2013.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2013
On level-1 cache locking for high-performance low-power real-time multicore systems.
Comput. Electr. Eng., 2013

Performance-power analysis of H.265/HEVC and H.264/AVC running on multicore cache systems.
Proceedings of the International Symposium on Intelligent Signal Processing and Communication Systems, 2013


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