Viet Ba Dang

Orcid: 0000-0002-6666-6337

According to our database1, Viet Ba Dang authored at least 9 papers between 2019 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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In proceedings 
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PhD thesis 
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Links

On csauthors.net:

Bibliography

2023
High-Speed Hardware Architectures and FPGA Benchmarking of CRYSTALS-Kyber, NTRU, and Saber.
IEEE Trans. Computers, February, 2023

2021
A Lightweight Implementation of Saber Resistant Against Side-Channel Attacks.
IACR Cryptol. ePrint Arch., 2021

2020
Implementation and Benchmarking of Round 2 Candidates in the NIST Post-Quantum Cryptography Standardization Process Using Hardware and Software/Hardware Co-design Approaches.
IACR Cryptol. ePrint Arch., 2020

Lightweight Implementation of the LowMC Block Cipher Protected Against Side-Channel Attacks.
Proceedings of the 4th ACM Workshop on Attacks and Solutions in Hardware Security Workshop, 2020

High-Level Synthesis in Implementing and Benchmarking Number Theoretic Transform in Lattice-Based Post-Quantum Cryptography Using Software/Hardware Codesign.
Proceedings of the Applied Reconfigurable Computing. Architectures, Tools, and Applications, 2020

2019
Evaluating the Potential for Hardware Acceleration of Four NTRU-Based Key Encapsulation Mechanisms Using Software/Hardware Codesign.
Proceedings of the Post-Quantum Cryptography - 10th International Conference, 2019

A High-Level Synthesis Approach to the Software/Hardware Codesign of NTT-Based Post-Quantum Cryptography Algorithms.
Proceedings of the International Conference on Field-Programmable Technology, 2019

Implementing and Benchmarking Three Lattice-Based Post-Quantum Cryptography Algorithms Using Software/Hardware Codesign.
Proceedings of the International Conference on Field-Programmable Technology, 2019

Software/Hardware Codesign of the Post Quantum Cryptography Algorithm NTRUEncrypt Using High-Level Synthesis and Register-Transfer Level Design Methodologies.
Proceedings of the 29th International Conference on Field Programmable Logic and Applications, 2019


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