Vijeyakumar Krishnasamy Natarajan

According to our database, Vijeyakumar Krishnasamy Natarajan authored at least 12 papers between 2015 and 2023.

Collaborative distances:

• Dijkstra number of six.
• Erdős number of five.

2023

Design of area, energy and security optimized reversible architectures for digital image cryptography.

Saranya Karunamurthi, Vijeyakumar Krishnasamy Natarajan

Circuits Syst. Signal Process., 2023

2022

Design of Precise Multiplier Using Inexact Compressor for Digital Signal Processing.

Nagarajan Shanmugam, Vijeyakumar Krishnasamy Natarajan, Kalaiselvi Sundaram, Natarajan Saravanakumar

Comput. Syst. Sci. Eng., 2022

2021

Area-Energy-Error Optimized Faithful Multiplier for Digital Signal Processing.

Kalaiselvi Sundaram, Vijeyakumar Krishnasamy Natarajan, Nagarajan Shanmugam, Kousalya Manoharan, Ramya Ramasamy, Sriram Kumar

Circuits Syst. Signal Process., 2021

A Low Area FPGA Implementation of Reversible Gate Encryption with Heterogeneous Key Generation.

Saranya Karunamurthi, Vijeyakumar Krishnasamy Natarajan

Circuits Syst. Signal Process., 2021

A Novel n-Decimal Reversible Radix Binary-Coded Decimal Multiplier Using Radix Encoding Scheme.

Saranya Karunamurthi, Vijeyakumar Krishnasamy Natarajan

Circuits Syst. Signal Process., 2021

2020

FPGA based implementation of MPPT algorithms for photovoltaic system under partial shading conditions.

A. Senthilvel, Vijeyakumar Krishnasamy Natarajan, B. Vinoth Kumar

Microprocess. Microsystems, 2020

Area Efficient Parallel Median Filter Using Approximate Comparator and Faithful Adder.

Vijeyakumar Krishnasamy Natarajan, Peter Thiagarajan Nelson Kingsley Joel, Shree Harpreet Singh Jatana, Natarajan Saravanakumar, Kalaiselvi Sundaram

IET Circuits Devices Syst., 2020

2019

VLSI implementation of reversible logic gates cryptography with LFSR key.

Saranya Karunamurthi, Vijeyakumar Krishnasamy Natarajan

Microprocess. Microsystems, 2019

Area-efficient parallel adder with faithful approximation for image and signal processing applications.

Gnanambikai Palanisamy, Vijeyakumar Krishnasamy Natarajan, Kalaiselvi Sundaram

IET Image Process., 2019

2018

VLSI Implementation of High Speed Energy-Efficient Truncated Multiplier.

Vijeyakumar Krishnasamy Natarajan, Elango Sekar, Kalaiselvi Sundaram

J. Circuits Syst. Comput., 2018

2016

Design of Efficient Reversible BCD Adder-Subtractor Architecture and Its Optimization Using Carry Skip Logic.

Praveena Murugesan, Thanushkodi Keppanagounder, Vijeyakumar Krishnasamy Natarajan

J. Circuits Syst. Comput., 2016

2015

An Adaptive Neuro-Fuzzy Model to Multilevel Inverter for Grid Connected Photovoltaic System.

P. Karuppusamy, A. M. Natarajan, Vijeyakumar Krishnasamy Natarajan

J. Circuits Syst. Comput., 2015