W. A. J. Waller

According to our database, W. A. J. Waller authored at least 7 papers between 1993 and 1999.

Collaborative distances:

• Dijkstra number of six.
• Erdős number of five.

1999

Java servlet technology for analogue module generation.

Les T. Walczowski, W. A. J. Waller

Proceedings of the 6th IEEE International Conference on Electronics, Circuits and Systems, 1999

1998

A digital engineering curriculum with integrated, Windows-based EDA tools.

Les T. Walczowski, Keith R. Dimond, W. A. J. Waller

Proceedings of the 5th IEEE International Conference on Electronics, Circuits and Systems, 1998

Multiple server WWW-based synthesis of VLSI circuits.

D. Nalbantis, Les T. Walczowski, W. A. J. Waller

Proceedings of the 5th IEEE International Conference on Electronics, Circuits and Systems, 1998

1997

Analogue layout generation by World Wide Web server-based agents.

Les T. Walczowski, D. Nalbantis, W. A. J. Waller, Keng-Hua Shi

Proceedings of the European Design and Test Conference, 1997

1996

Rapid layout synthesis for analog VLSI.

Les T. Walczowski, W. A. J. Waller, D. Nalbantis, Keng-Hua Shi

Proceedings of Third International Conference on Electronics, Circuits, and Systems, 1996

1994

On Testability of Differential Split-Level CMOS Circuits.

S. M. Aziz, W. A. J. Waller

Proceedings of the Seventh International Conference on VLSI Design, 1994

1993

A C-testable parallel multiplier using differential cascode voltage switch (DDVS) logic.

W. A. J. Waller, S. M. Aziz

Proceedings of the VLSI 93, 1993