Waqar Hussain
Orcid: 0000-0003-0295-9912Affiliations:
- Tampere University of Technology, Laboratory of Electronics and Communications Engineering, Finland
- Norwegian University of Science and Technology, Department of Computer Science, Trondheim, Norway
According to our database1,
Waqar Hussain
authored at least 19 papers
between 2009 and 2018.
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Bibliography
2018
Errata to "Evaluation of a Heterogeneous Multicore Architecture by Design and Test of an OFDM Receiver".
IEEE Trans. Parallel Distributed Syst., 2018
2017
Power Mitigation by Performance Equalization in a Heterogeneous Reconfigurable Multicore Architecture.
J. Signal Process. Syst., 2017
Evaluation of a Heterogeneous Multicore Architecture by Design and Test of an OFDM Receiver.
IEEE Trans. Parallel Distributed Syst., 2017
2016
HARP2: An X-Scale Reconfigurable Accelerator-Rich Platform for Massively-Parallel Signal Processing Algorithms.
J. Signal Process. Syst., 2016
2015
Design and evaluation of correlation accelerator in IEEE-802.11a/g receiver using a template-based Coarse-Grained Reconfigurable Array.
Proceedings of the Nordic Circuits and Systems Conference, 2015
Proceedings of the Nordic Circuits and Systems Conference, 2015
Implementation of IEEE-802.11a/g receiver blocks on a coarse-grained reconfigurable array.
Proceedings of the 2015 Conference on Design and Architectures for Signal and Image Processing, 2015
2014
Proceedings of the 2014 International Symposium on System-on-Chip, 2014
Design of an accelerator-rich architecture by integrating multiple heterogeneous coarse grain reconfigurable arrays over a network-on-chip.
Proceedings of the IEEE 25th International Conference on Application-Specific Systems, 2014
2013
Evaluation of WCDMA receiver baseband processing on a Multi-Processor System-On-Chip.
Proceedings of the 18th International Conference on Digital Signal Processing, 2013
A Reconfigurable Application-specific Instruction-set Processor for Fast Fourier Transform processing.
Proceedings of the 24th International Conference on Application-Specific Systems, 2013
2012
Designing Fast Fourier Transform Accelerators for Orthogonal Frequency-Division Multiplexing Systems.
J. Signal Process. Syst., 2012
Energy and power estimation of Coarse-Grain Reconfigurable Array based Fast Fourier Transform accelerators.
Proceedings of the 7th International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC), 2012
Effects of scaling a coarse-grain reconfigurable array on power and energy consumption.
Proceedings of the 2012 International Symposium on System on Chip, 2012
2011
Proceedings of the 2011 NASA/ESA Conference on Adaptive Hardware and Systems, 2011
2010
Exploiting control management to accelerate Radix-4 FFT on a reconfigurable platform.
Proceedings of the 2010 International Symposium on System on Chip, SoC 2010, Tampere, 2010
Control Techniques for Coupling a Coarse-Grain Reconfigurable Array with a Generic RISC Core.
Proceedings of the International Conference on Field Programmable Logic and Applications, 2010
Proceedings of the 13th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2010
2009
Proceedings of the 19th International Conference on Field Programmable Logic and Applications, 2009