Wei-Ting Wei

According to our database, Wei-Ting Wei authored at least 1 paper in 2007.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2007

Using power gating techniques in area-array SoC floorplan design.

Chi-Yi Yeh, Hung-Ming Chen, Li-Da Huang, Wei-Ting Wei, Chao-Hung Lu, Chien-Nan Jimmy Liu

Proceedings of the 2007 IEEE International SOC Conference, 2007