Won-Young Jung

According to our database¹, Won-Young Jung authored at least 9 papers between 1995 and 2013.

Collaborative distances:

Dijkstra number² of five.
Erdős number³ of five.

Timeline

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In proceedings

Article

PhD thesis

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On csauthors.net:

Bibliography

2013

A Digitally-Controlled SMPS Using a Novel High-Resolution DPWM Generator Based on a Pseudo Relaxation-Oscillation Technique.

[BibT_eX]

[DOI]

IEICE Trans. Electron., 2013

2011

A Non-snapback ESD Protection Clamp Circuit Using Isolated Parasitic Capacitance in a 0.35 µm Bipolar-CMOS-DMOS Process.

[BibT_eX]

[DOI]

IEICE Trans. Electron., 2011

A Precision Floating-Gate Mismatch Measurement Technique for Analog Application.

[BibT_eX]

[DOI]

IEICE Trans. Electron., 2011

2010

On-Chip Charged Device Model ESD Protection Design Method Using Very Fast Transmission Line Pulse System for RF ICs.

[BibT_eX]

[DOI]

IEICE Trans. Electron., 2010

2009

A Latchup-Free ESD Power Clamp Circuit with Stacked-Bipolar Devices for High-Voltage Integrated Circuits.

[BibT_eX]

[DOI]

IEICE Trans. Electron., 2009

2008

Novel Method of Interconnect Worstcase Establishment with Statistically-Based Approaches.

[BibT_eX]

[DOI]

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2008

2007

A Novel High-Speed and Low-Voltage CMOS Level-Up/Down Shifter Design for Multiple-Power and Multiple-Clock Domain Chips.

[BibT_eX]

[DOI]

IEICE Trans. Electron., 2007

2006

Fast and Accurate Power Bus Designer for Multi-Layers High-Speed Digital Boards.

[BibT_eX]

[DOI]

Yong-Ju Kim

Won-Young Jung

Jae-Kyung Wee

IEICE Trans. Electron., 2006

1995

Integrated interconnect circuit modeling for VLSI design.

[BibT_eX]

[DOI]

Proceedings of the 1995 Conference on Asia Pacific Design Automation, Makuhari, Massa, Chiba, Japan, August 29, 1995

Won-Young Jung

Timeline

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Links

On csauthors.net:

Bibliography

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