Xin-chun Wu

According to our database, Xin-chun Wu authored at least 9 papers between 2009 and 2013.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2013

A Low Power Built-in Self-Test Scheme Based on Overlapping Bit Swapping Linear Feedback Shift Register.

Bin Zhou, Xin-chun Wu, Yu Sun, Tianqi Wang, Liyi Xiao

J. Low Power Electron., 2013

2012

Test Pattern Generation Based on Multi-TRC Scan Architecture for Reducing Test Cost.

Bin Zhou, Liyi Xiao, Yizheng Ye, Xin-chun Wu, Bei Cao

J. Low Power Electron., 2012

2011

Low Complexity Time Domain Interleaved Partitioning Partial Transmit Sequence Scheme for Peak-to-Average Power Ratio Reduction of Orthogonal Frequency Division Multiplexing Systems.

Xin-chun Wu, Bin Zhou, Jinxiang Wang, Zhigang Mao

Wirel. Pers. Commun., 2011

Companding schemes based on transforming signal statistics into trigonal distributions for PAPR reduction in OFDM systems.

Xin-chun Wu, Jinxiang Wang, Bin Zhou, Zhigang Mao, Zhiqiang Gao

Int. J. Commun. Syst., 2011

Optimization of Test Power and Data Volume in BIST Scheme Based on Scan Slice Overlapping.

Bin Zhou, Liyi Xiao, Yizheng Ye, Xin-chun Wu

J. Electron. Test., 2011

2010

A test set embedding approach based on twisted-ring counter with few seeds.

Bin Zhou, Yizheng Ye, Zhao-lin Li, Jianwei Zhang, Xin-chun Wu, Rui Ke

Integr., 2010

Conjugate Interleaved Partitioning PTS Scheme for PAPR Reduction of OFDM Signals.

Xin-chun Wu, Jinxiang Wang, Zhigang Mao, Jianwei Zhang

Circuits Syst. Signal Process., 2010

2009

A new low power test pattern generator using a variable-length ring counter.

Bin Zhou, Yizheng Ye, Zhao-lin Li, Xin-chun Wu, Rui Ke

Proceedings of the 10th International Symposium on Quality of Electronic Design (ISQED 2009), 2009

Reduction of Test Power and Data Volume in BIST Scheme based on Scan Slice Overlapping.

Bin Zhou, Yizheng Ye, Xin-chun Wu, Zhao-lin Li

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009