Xunwei Wu

According to our database, Xunwei Wu authored at least 19 papers between 1991 and 2003.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2003

Power Minimization of FPRM Functions Based on Polarity Conversion.

Yinshui Xia, Xunwei Wu, A. E. A. Almaini

J. Comput. Sci. Technol., 2003

2002

Low power DCVSL circuits employing AC power supply.

Xunwei Wu, Guoqiang Hang, Massoud Pedram

Sci. China Ser. F Inf. Sci., 2002

Design of Ternary Schmitt Triggers Based on Its Sequential Characteristics.

Yinshui Xia, Xunwei Wu, Penjung Wang

Proceedings of the 32nd IEEE International Symposium on Multiple-Valued Logic (ISMVL 2002), 2002

2000

Novel ?-Type Resistor Network in D/A Converter Based on Multiple-Valued Logic.

Xunwei Wu, Xuanchang Zhou

Proceedings of the 30th IEEE International Symposium on Multiple-Valued Logic, 2000

Propagation Algorithm of Behavior Probability in Power Estimation Based on Multiple-Valued Logic.

Xunwei Wu, Massoud Pedram

Proceedings of the 30th IEEE International Symposium on Multiple-Valued Logic, 2000

Low power sequential circuit design by using priority encoding and clock gating.

Xunwei Wu, Massoud Pedram

Proceedings of the 2000 International Symposium on Low Power Electronics and Design, 2000

Low-power design of sequential circuits using a quasi-synchronous derived clock.

Xunwei Wu, Jian Wei, Massoud Pedram, Qing Wu

Proceedings of ASP-DAC 2000, 2000

Analysis of power-clocked CMOS with application to the design of energy-recovery circuits.

Massoud Pedram, Xunwei Wu

Proceedings of ASP-DAC 2000, 2000

1999

Bounded algebra and current-mode digital circuits.

Xunwei Wu, Massoud Pedram

J. Comput. Sci. Technol., 1999

1998

A New Design for Double Edge Triggered Flip-flops.

Massoud Pedram, Qing Wu, Xunwei Wu

Proceedings of the ASP-DAC '98, 1998

1997

Design of Ternary CCD Circuits Referencing to Current-Mode CMOS Circuits.

Xunwei Wu, Massoud Pedram

Proceedings of the 27th IEEE International Symposium on Multiple-Valued Logic, 1997

Comparison between nMos Pass Transistor logic style vs. CMOS Complementary Cells.

Rakesh Mehrotra, Massoud Pedram, Xunwei Wu

Proceedings of the Proceedings 1997 International Conference on Computer Design: VLSI in Computers & Processors, 1997

A note on the relationship between signal probability and switching activity.

Qing Wu, Massoud Pedram, Xunwei Wu

Proceedings of the ASP-DAC '97 Asia and South Pacific Design Automation Conference, 1997

A new description of CMOS circuits at switch-level.

Massoud Pedram, Xunwei Wu

Proceedings of the ASP-DAC '97 Asia and South Pacific Design Automation Conference, 1997

1996

Design technique of I²L circuits based on multi-valued logic.

Xunwei Wu, Guoqiang Hang

J. Comput. Sci. Technol., 1996

1995

Race-Hazard and Skip-Hazard in Multivalued Combinational Circuits.

Xunwei Wu, Xiexiong Chen, Jizhong Shen

Proceedings of the 25th IEEE International Symposium on Multiple-Valued Logic, 1995

The High-Speed Ternary Logic Gates Based on the Multiple beta Transistors.

Shoujue Wang, Xunwei Wu, Hongjuan Feng

Proceedings of the 25th IEEE International Symposium on Multiple-Valued Logic, 1995

1992

The Theory of Clipping Voltage-Switches and Design of Quaternary nMOS Circuits.

Xunwei Wu

Proceedings of the 22nd IEEE International Symposium on Multiple-Valued Logic, 1992

1991

Theory of Grounded Current Switches and Quatemary IIL Circuits.

Xunwei Wu, Xiaowei Deng

Proceedings of the 21st International Symposium on Multiple-Valued Logic, 1991